• 제목/요약/키워드: Buffer

검색결과 6,274건 처리시간 0.029초

Hardware protocol stack에서 free buffer size결정 방법 (The decision method of free buffer size in hardware protocol stack)

  • 문춘경;김영근
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2004년도 학술대회 논문집 정보 및 제어부문
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    • pp.212-214
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    • 2004
  • Hardware implemented ring buffer systems and methods are presented for the effective management of the ring buffer in TCP/IP communication. The layer interface of the ring buffer systems transfer free buffer and used buffer size information to the TCP/IP stack upper or low layer. The pointer updation interface calculates a temporary pointer from the data size which is needed by the present pointer of the ring buffer and upper or lowyer layer. The pointer manager of the ring buffer systems is responsible for saving the present pointer of the ring buffer, updating the ring buffer pointer to the new pointer, calculating the free buffer size and used buffer size of the ring buffer, and transferring the information to the upper layer. The ring buffer systems help the TCP/IP layer and TCP/IP upper or lower layer to decide the sending or receiving data size effectively. The delay of transferring data can be lowered by the ring buffer system.

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최소가공 처리 감자에 대한 Citrate 및 Phosphate의 갈변저해 효과 (Effect of Citrate and Phosphate on the Inhibition of Browning in Minimally Processed Potatoes)

  • 허정
    • 한국조리학회지
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    • 제13권2호
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    • pp.254-259
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    • 2007
  • 최소가공 감자의 갈변을 억제하기 위해 감자를 박피 절단하여 다양한 농도의 citrate buffer와 phosphate buffer로 각각 처리한 후 저밀도 폴리에틸렌 포장지로 밀봉하여 $5^{\circ}C$$20^{\circ}C$에 저장하면서 실험에 사용하였다. 최소가공 처리 된 감자를 24시간 저장 후 색도 변화를 측정한 후 ${\Delta}L$값과 ${\Delta}E$ 값을 계산하여 갈변 효과를 조사한 결과, citrate buffer 처리구가 phosphate buffer 처리구에 비하여 전반적으로 우수한 갈변억제 효과를 나타내었으며, 동일 buffer에서 pH가 낮을수록 우수한 효과를 나타내었다. Citrate buffer, pH 3.0에 처리 후 $5^{\circ}C$에 저장한 조건이 대조구에 비하여 약 35배 이상의 효과를 나타내어 가장 우수한 갈변억제능을 나타내었다. 농도별 처리에서는 citrate buffer(pH 3.0)에서 전반적으로 우수한 갈변억제 효과를 나타내고 있었으나, 0.5 M의 농도에서는 phosphate buffer(pH 5.0) 처리구가 더욱 우수한 갈변억제 효과를 나타내었다.

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PCI 익스프레스의 데이터 연결 계층에서 송신단 버퍼 관리를 위한 효과적인 방법 (An Effective Method to Manage the Transmitter's Buffer in the Data Link Layer of the PCI Express)

  • 현유진;성광수
    • 전자공학회논문지CI
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    • 제41권5호
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    • pp.9-16
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    • 2004
  • PCI 익스프레스 디바이스의 데이터 연결 계층은 전송할 패킷을 저장하고 있는 송신 버퍼와 전송하였지만 아직 타겟 디바이스로부터 승인 받지 못한 패킷을 저장하고 있는 재전송 버퍼를 가지고 있어야 한다. 이렇게 전송 버퍼와 재전송 버퍼를 구분하여 구현할 경우 전송할 패킷이 전송 버퍼에 있다 하더라도 재전송 버퍼에 여유 공간이 없다면 더 이상 패킷을 전송 할 수 없다는 단점이 있다. 본 논문에서는 한 개의 버퍼로 전송 버퍼와 재전송 버퍼를 구현하는 방법을 제안한다. 제안된 버퍼 구조에서는 필요에 따라 버퍼의 공간을 유연하게 사용할 수 있기 때문에 버퍼 사용 및 데이터 전송 효율을 향상시킬 수 있다. 모의 실험 결과 버퍼의 전체 크기가 8K 바이트일 경우 제안된 방법이 버퍼를 분리하여 사용하는 방법에 비해 데이터 전송 효율이 평균 39% 향상되었다.

PCI-Express의 재전송 버퍼 관리 기법 (Effective Management for Retry Buffer on PCI-Express Interface)

  • 장형식;현유진;성광수
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 컴퓨터소사이어티 추계학술대회논문집
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    • pp.69-72
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    • 2003
  • The PCI Express spec introduces retry buffer in Data Link Layer For data integrity. But this buffer have some restrictions as buffer's usage. So we proposed effective management for retry buffer on PCI-Express interface. Proposed buffer management give increase performance and data integrity simultaneously.

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Relaying Protocols and Delay Analysis for Buffer-aided Wireless Powered Cooperative Communication Networks

  • Zhan, Jun;Tang, Xiaohu;Chen, Qingchun
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제12권8호
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    • pp.3542-3566
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    • 2018
  • In this paper, we investigate a buffer-aided wireless powered cooperative communication network (WPCCN), in which the source and relay harvest the energy from a dedicated power beacon via wireless energy transfer, then the source transmits the data to the destination through the relay. Both the source and relay are equipped with an energy buffer to store the harvested energy in the energy transfer stage. In addition, the relay is equipped with a data buffer and can temporarily store the received information. Considering the buffer-aided WPCCN, we propose two buffer-aided relaying protocols, which named as the buffer-aided harvest-then-transmit (HtT) protocol and the buffer-aided joint mode selection and power allocation (JMSPA) protocol, respectively. For the buffer-aided HtT protocol, the time-averaged achievable rate is obtained in closed form. For the buffer-aided JMSPA protocol, the optimal adaptive mode selection scheme and power allocation scheme, which jointly maximize the time-averaged throughput of system, are obtained by employing the Lyapunov optimization theory. Furthermore, we drive the theoretical bounds on the time-averaged achievable rate and time-averaged delay, then present the throughput-delay tradeoff achieved by the joint JMSPA protocol. Simulation results validate the throughput performance gain of the proposed buffer-aided relaying protocols and verify the theoretical analysis.

Fast NAND Flash Memory System for Instruction Code Execution

  • Jung, Bo-Sung;Kim, Cheong-Ghil;Lee, Jung-Hoon
    • ETRI Journal
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    • 제34권5호
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    • pp.787-790
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    • 2012
  • The objective of this research is to design a high-performance NAND flash memory system containing a buffer system. The proposed instruction buffer in the NAND flash memory consists of two parts, that is, a fully associative temporal buffer for temporal locality and a fully associative spatial buffer for spatial locality. A spatial buffer with a large fetching size turns out to be effective for serial instructions, and a temporal buffer with a small fetching size is devised for branch instructions. Simulation shows that the average memory access time of the proposed system is better than that of other buffer systems with four times more space. The average miss ratio is improved by about 70% compared with that of other buffer systems.

Buffer Policy based on High-capacity Hybrid Memories for Latency Reduction of Read/Write Operations in High-performance SSD Systems

  • Kim, Sungho;Hwang, Sang-Ho;Lee, Myungsub;Kwak, Jong Wook;Park, Chang-Hyeon
    • 한국컴퓨터정보학회논문지
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    • 제24권7호
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    • pp.1-8
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    • 2019
  • Recently, an SSD with hybrid buffer memories is actively researching to reduce the overall latency in server computing systems. However, existing hybrid buffer policies caused many swapping operations in pages because it did not consider the overall latency such as read/write operations of flash chips in the SSD. This paper proposes the clock with hybrid buffer memories (CLOCK-HBM) for a new hybrid buffer policy in the SSD with server computing systems. The CLOCK-HBM constructs new policies based on unique characteristics in both DRAM buffer and NVMs buffer for reducing the number of swapping operations in the SSD. In experimental results, the CLOCK-HBM reduced the number of swapping operations in the SSD by 43.5% on average, compared with LRU, CLOCK, and CLOCK-DNV.

Improvement of the luminous efficiency of organic light emitting diode using LiF anode buffer layer

  • 박원혁;김강훈
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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    • pp.147-147
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    • 2015
  • The multilayer structure of the organic light emitting diode has merits of improving interfacial characteristics and helping carriers inject into emission layer and transport easier. There are many reports to control hole injection from anode electrode by using transition metal oxide as an anode buffer layer, such as V2O5, MoO3, NiO, and Fe3O4. In this study, we apply thin films of LiF which is usually inserted as a thin buffer layer between electron transport layer(ETL) and cathode, as an anode buffer layer to reduce the hole injection barrier height from ITO. The thickness of LiF as an anode buffer layer is tested from 0 nm to 1.0 nm. As shown in the figure 1 and 2, the luminous efficiency versus current density is improved by LiF anode buffer layer, and the threshold voltage is reduced when LiF buffer layer is increased up to 0.6 nm then the device does not work when LiF thickness is close to 1.0 nm As a result, we can confirm that the thin layer of LiF, about 0.6 nm, as an anode buffer reduces the hole injection barrier height from ITO, and this results the improved luminous efficiency. This study shows that LiF can be used as an anode buffer layer for improved hole injection as well as cathode buffer layer.

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Buffer Scheme Optimization of Epidemic Routing in Delay Tolerant Networks

  • Shen, Jian;Moh, Sangman;Chung, Ilyong;Sun, Xingming
    • Journal of Communications and Networks
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    • 제16권6호
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    • pp.656-666
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    • 2014
  • In delay tolerant networks (DTNs), delay is inevitable; thus, making better use of buffer space to maximize the packet delivery rate is more important than delay reduction. In DTNs, epidemic routing is a well-known routing protocol. However, epidemic routing is very sensitive to buffer size. Once the buffer size in nodes is insufficient, the performance of epidemic routing will be drastically reduced. In this paper, we propose a buffer scheme to optimize the performance of epidemic routing on the basis of the Lagrangian and dual problem models. By using the proposed optimal buffer scheme, the packet delivery rate in epidemic routing is considerably improved. Our simulation results show that epidemic routing with the proposed optimal buffer scheme outperforms the original epidemic routing in terms of packet delivery rate and average end-to-end delay. It is worth noting that the improved epidemic routing needs much less buffer size compared to that of the original epidemic routing for ensuring the same packet delivery rate. In particular, even though the buffer size is very small (e.g., 50), the packet delivery rate in epidemic routing with the proposed optimal buffer scheme is still 95.8%, which can satisfy general communication demand.

ZnO buffer 층을 이용한 초음파 분무열분해 ZnO 박막 증착 (Spray Pyrolysis Deposition of Zinc Oxide Thin Films by ZnO Buffer Layer)

  • 한인섭;박일규
    • 한국재료학회지
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    • 제27권8호
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    • pp.403-408
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    • 2017
  • We investigated the effect of ZnO buffer layer on the formation of ZnO thin film by ultrasonic assisted spray pyrolysis deposition. ZnO buffer layer was formed by wet solution method, which was repeated several times. Structural and optical properties of the ZnO thin films deposited on the ZnO buffer layers with various cycles and at various temperatures were investigated by field-emission scanning electron microscopy, X-ray diffraction, and photoluminescence spectrum analysis. The structural investigations showed that three-dimensional island shaped ZnO was formed on the bare Si substrate without buffer layers, while two-dimensional ZnO thin film was deposited on the ZnO buffer layers. In addition, structural and optical investigations showed that the crystalline quality of ZnO thin film was improved by introducing the buffer layers. This improvement was attributed to the modulation of the surface energy of the Si surface by the ZnO buffer layer, which finally resulted in a modification of the growth mode from three to two-dimensional.