• Title/Summary/Keyword: Boolean function

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A Study on the Real Time Expert System for Power System Fault Diagnosis (전력계통의 실시간 고장진단을 위한 전문가 시스템에 관한 연구)

  • Park, Young-Moon;Chung, Jae-Gil;Kim, Gwang-Won
    • Proceedings of the KIEE Conference
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    • 1997.07c
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    • pp.927-929
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    • 1997
  • In this paper, a new expert system scheme, called Logic Based Expert System (LBES), is proposed for real time fault diagnosis of power system. In LBES, Expertise is represented by logical connectives and converted into a Boolean function. The set of Prime Implicants (PIs) of the Boolean function contains all the sound inference results which can be obtained from the expertise. Therefore, off-line inference is possible by off-line PI identification, which reduces the on-line inference time considerably and makes it possible to utilize-the LBES in real-time environment.

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World Sense Disambiguation using Multiple Feature Decision Lists (다중 자질 결정 목록을 이용한 단어 의미 중의성 해결)

  • 서희철;임해창
    • Journal of KIISE:Software and Applications
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    • v.30 no.7_8
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    • pp.659-671
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    • 2003
  • This paper proposes a method of disambiguating the senses of words using decision lists, which consists of rules with confidence values. The rule of decision list is composed of a boolean function(=precondition) and a class(=sense). Decision lists classify the instance using the rule with the highest confidence value that is matched with it. Previous work disambiguated the senses using single feature decision lists, whose boolean function was composed of only one feature. However, this approach can be affected more severely by data sparseness problem and preprocessing errors. Hence, we propose multiple feature decision lists that have the boolean function consisting of more than one feature in order to identify the senses of words. Experiments are performed with 1 sense tagged corpus in Korean and 5 sense tagged corpus in English. The experimental results show that multiple feature decision lists are more effective than single feature decision lists in disambiguating senses.

Full-Round Differential Attack on the Original Version of the Hash Function Proposed at PKC'98 (PKC'98에 제안된 해쉬 함수의 Original Version에 대한 전체 라운드 차분 공격)

  • 장동훈;성재철;이상진;임종인;성수학
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.12 no.2
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    • pp.65-76
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    • 2002
  • Shin et al. proposed the new hash function with 160-bit output length at PKC'98. This hash function is based on the advantages of the existing hash functions, such as SHA-1, RIPEMD-160, HAVAL, and etc.$^{[1]}$ Recently, Han et al. cryptanalyzed the hash function proposed at PKC'98 and proposed the method finding a collision pair with $2^{-30}$ probability at FSE 2002, supposing that boolean functions satisfy SAC(Strict Avalanche Criterian).$^{[2]}$ This paper improves the method and shows that we can find a collision pair from the original version of the hash function with $2^{-37.13}$ probability through the improved method. And we point out that the problem of the function comes from shift values dependent on message.

The Development of PLD Design Tool using the EDIF Netlist (EDIF Netlist를 이용한 PLD 설계용 툴 개발)

  • Kim, Hi-Seok;Byun, Sang-Zoon
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.4
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    • pp.1025-1032
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    • 1998
  • In this paper, the PLD design tool which realizes a digital circuit as PLD, by using EDIF netlist of the digital circuit designed at OrCAD have been developed. This paper is proposed the following algorithms: JIE(Joined Information Extractor) which extracts the connecting information between both cells in order to realize the digital circuit as PLD using the EDIF netlist, FND(Feedback Node Detector) which look into whether feedback exists or not, BEG(Boolean Equation Generator) which generates a boolean equation, and so on. Also, this paper is developed auto-select function which selects the PLD element with consideration of number of I/O variables of the minimized boolean equation, and algorithm generation JEDEC file of GAL6001 and GAL6002, having a forms of EPLD which is bigger than PLD.

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Design of a Technology Mapping System for Logic Circuits (논리 회로의 기술 매핑 시스템 설계)

  • 김태선;황선영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.29A no.2
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    • pp.88-99
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    • 1992
  • This paper presents an efficient method of mapping Boolean equations to a set of library gates. The proposed system performs technology mapping by graph covering. To select optimal area cover, a new cost function and local area optimization are proposed. Experimental results show that the proposed algorithm produces effective mapping using given library.

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(The Minimization of Boolean functions to the Exclusive-OR sum of Products logic) (부울함수의 논리곱의 배타적 합 논리로의 간략화)

  • 이진흥;이상곤;문상재;서용수;김태근;정원영
    • Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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    • 1997.11a
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    • pp.315-321
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    • 1997
  • 본 논문에서는 임의의 부울함수(Boolean function)에 대한 진리표나 출력 시퀀스로부터 논리곱의 배타적 합(exclusive-or sum of products; ESOP)형의 부울함수를 구성하는 알고리듬을 제안한다. 기존에 알려진 카르노맵이나 Quine HcClusky법에 의하여 구해지는 부울함수는 논리곱의 합(sum of product; SOP) 형으로 주어지며 이들 수식은 부정(NOT)논리를 포함하는 경우가 있다. 제안된 알고리듬에 의하여 구해지는 부울함수는 구조적인 등가성을 판별하는데 편리하므로 해쉬함수용 부울함수의 개발에 이용될 수 있다.

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Error Detection using Advanced Parity Bit (패리티 비트를 확장한 오류 검사에 관한 연구)

  • Kim, In-Soo;Min, Hyoung-Bok;Kim, Yong-Hyun;Kim, Shin-Taek
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.1965-1966
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    • 2008
  • The manipulation of Boolean functions is a fundamental part of computer science, and many problems in the design and testing of digital systems can be expressed as a sequence of operations. It is mainly a paper of our research on the techniques of Boolean function manipulation using Binary Decision Diagram(BDDs) and their applications for VLSI CAD System. In many practical applications related to digital system design, it is a basic technique to use ternary-valued functions. In this paper, we discuss the methods for representing logical values.

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Optical Look-ahead Carry Full-adder Using Dual-rail Coding

  • Gil Sang Keun
    • Journal of the Optical Society of Korea
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    • v.9 no.3
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    • pp.111-118
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    • 2005
  • In this paper, a new optical parallel binary arithmetic processor (OPBAP) capable of computing arbitrary n-bit look-ahead carry full-addition is proposed and implemented. The conventional Boolean algebra is considered to implement OPBAP by using two schemes of optical logic processor. One is space-variant optical logic gate processor (SVOLGP), the other is shadow-casting optical logic array processor (SCOLAP). SVOLGP can process logical AND and OR operations different in space simultaneously by using free-space interconnection logic filters, while SCOLAP can perform any possible 16 Boolean logic function by using spatial instruction-control filter. A dual-rail encoding method is adopted because the complement of an input is needed in arithmetic process. Experiment on OPBAP for an 8-bit look-ahead carry full addition is performed. The experimental results have shown that the proposed OPBAP has a capability of optical look-ahead carry full-addition with high computing speed regardless of the data length.

On the Computerization of Minimizing the Switching Function by the MASK Method

  • Cho, Dong-Sub;Hwang, Hee-Yeung
    • Proceedings of the KIEE Conference
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    • 1979.08a
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    • pp.69-72
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    • 1979
  • This paper deals with the computer method of finding the minimal sum of products for a switching function by using the MASK method derived from the characteristics of the Boolean algebra. The experiments with the program which is dissimilar to the previous computer programs show that the algorithm presented will be more efficient.

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On the Minimization of the Switching Function by the MASK Method (MASK 방법에 의한 이론함수의 최소화)

  • 조동섭;황희융
    • 전기의세계
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    • v.28 no.11
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    • pp.37-44
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    • 1979
  • This paper deals with the computer program of finding the minimal sum-of-products for a switching function by using the MASK method derived from the characteristics of the Boolean algebra. The approach differs from the previous procedures in that all the prime implicants are determined only by the bit operation and the minimal sum-of-products are obtained by the modified Petrick method in this work. The important features are the relatively small amount of the run time and the less memory capacity to solve a problem, as compared to the previous computer programs.

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