• 한국경영과학회:학술대회논문집
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• 대한산업공학회/한국경영과학회 2000년도 춘계공동학술대회 논문집
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• pp.473-476
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• 2000

The network reliability is to be computed in terms of the terminal reliability. The computation of a termini reliability is started with a Boolean sum of products expression corresponding to simple paths of the pair of nodes. This expression is then transformed into another equivalent expression to be a Disjoint Sum of Products form. But this computaion of the terminal reliability obviously does not consider the communication between any other nodes but for the source and the sink. In this paper, we derive the overall network reliability which is the probability of communication that each node in the network communicates with all other remaining nodes. For this, we propose a method to make the SOP disjoint for deriving the network reliability expression from the system success expression using the modified Sheinman's method and modified BDD method.

• 대한전자공학회논문지
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• 제22권2호
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• pp.25-30
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• 1985

본 논문은 PLA 면적랑적화화를 위한 논리최소화에 대한 새로운 알고리즘을 제안한다. 계산기 처리시간이 변수의 수에 직접적으로 의존하는 종래구식과는 달리, 준 구식은 논리함수에서 base minterm과 consensus가 되지않는 민텀들의 집합을 그 함수로부터 제거하여 줌으로써 계산기 처리시간은 base minterm의 consensus의 차수에 의존하여 변수의 수가 증가할수록 종래형식에 비하여 행산시간치의 차가 커진다. 실제 계산기 실험을 통하여 종래수식과의 계산기 달행시문 비교치의 예를 제시한다.

• 전자공학회논문지A
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• 제32A권10호
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• pp.102-110
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• 1995

This paper describes a development of the PLD design tool in considering with a device fitting. To design digital circuit with PLDs, several steps in the developed PLD design tool are needed such as Boolean description step, pin map step, FUSE map and JEDEC steps ... etc. Especially, we have considered the device fitting to design large digital circuits with PLDs developed the device fitting algorithms based on the PLD device fitting and compared with the results of a another PLD design tool(PALASM). Also, we have proved that the developed PLD design tool is successfully implemented by the connection with a PLD writer(ALL-07), in the case of design digital circuits.

• 한국HCI학회:학술대회논문집
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• 한국HCI학회 2007년도 학술대회 1부
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• pp.957-962
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• 2007

본 논문에서 제안하는 정보 검색기는 일반적인 불리언(Boolean) 질의를 통해서 정보를 검색하는 것이 아니라, 문장으로 입력된 질의형태의 패턴을 분석하여 그에 맞는 정보를 직접 제공하는 것에 목적을 둔다. 이를 위해 어휘 의미 패턴(Lexical Semantic Pattern)과 온톨로지(Ontology) 기술이 정보검색기 개발에 적용되었다. 제안된 시스템에서는 다양한 형태로 표현된 문장 질의를 어휘 의미 패턴을 사용해서 문장의 질의 패턴을 추출하고 사용자 질의를 하나의 온톨로지(Ontology) 추론 질의와 매칭함으로써 질의에 대한 정확한 해답을 추출할 수 있다. 또한, 자연어 문장 입력에 대한 검색 질의 생성기를 구축하고 온톨로지로 표현된 지식을 사용하여 정보검색기 질의를 자동으로 확장함으로써 더욱 정확한 정보 검색 결과를 만들어 낼 수 있다.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 2004년도 춘계학술대회 학술발표 논문집 제14권 제1호
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• pp.372-377
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• 2004

We introduce the concepts of intuitionistic fuzzy ideals and intuitionistic fuzzy congruences on a lattice, and discuss the relationship between intuitionistic fuzzy ideals and intuitionistic fuzzy congruence on a distributive lattice. Also we prove that for a generalized Boolean algebra, the lattice of intuitionistic fuzzy ideals is isomorphic to the lattice of intuitionistic fuzzy congruences. Finally, we consider the products of intuitionistic fuzzy ideals and obtain a necessary and sufficient condition for an intuitionistic fuzzy ideals on the direct sum of lattices to be representable on a direct sum of intuitionistic fuzzy ideals on each lattice.

• 한국지능시스템학회논문지
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• 제14권2호
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• pp.216-221
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• 2004

This paper describes an optimal synthesis method of binary neural network for pattern recognition. Our objective is to minimize the number of connections and the number of neurons in hidden layer by using a Newly Expanded and Truncated Learning Algorithm (NETLA) for the multilayered neural networks. The synthesis method in NETLA uses the Expanded Sum of Product (ESP) of the boolean expressions and is based on the multilayer perceptron. It has an ability to optimize a given binary neural network in the binary space without any iterative learning as the conventional Error Back Propagation (EBP) algorithm. Furthermore, NETLA can reduce the number of the required neurons in hidden layer and the number of connections. Therefore, this learning algorithm can speed up training for the pattern recognition problems. The superiority of NETLA to other learning algorithms is demonstrated by an practical application to the approximation problem of a circular region.

• 한국정보처리학회논문지
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• 제5권7호
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• pp.1883-1895
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• 1998

Java 프로그램밍 언어는 general-purpose concurrent object-oriented 언어로 알려져 있다. Java 언어는 개념과 구문 모두가 매우 간결하고 통일되어 있으며 인터넷 환경에서 최대한 활용되도록 하기 위하여 가상기계 개념을 도입하여 목적코드를 생성한다. 프로그래밍 언어에서 가장 중요한 부분이 data type 부분이다. Java 언어는 primitive type과 reference type을 지원한다. Primitive type과 reference type을 지원한다. Primitive type에는 boolean type integral type이 있다. Integral type에는 character, byte, short integer, integer, long integer, single-precision 과 double-precision floating point number가 있다. Reference type에는 class type, interface type, array type이 있다. 그러나 Java 언어는 general-purpose 프로그래밍 언어가 일반적으로 지원하는 structure type을 지원하지 않는다. 대신에 class type이 structure type을 포함하여 지원하는 구조로 되어 있다. 그러나 class type과 structure type은 서로 상이한 data type으로 판단된다. 따라서 Java 언어가 general-purpose의 성격을 가지기 위해서는 structure type을 명시적으로 지원하는 것이 바람직하다고 생각된다. 이 논문은 structure type을 Java 언어에 포함시킬 것을 제안한다.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1989년도 한국자동제어학술회의논문집; Seoul, Korea; 27-28 Oct. 1989
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• pp.805-812
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• 1989

An efficient diagnostic approach for real-time operation aiding expert system in chemical process plants is discussed. The approach is based on the hybrid of the simplified symptom tree(SST) and the fault consequence digraph(FCD), representation of propagation patterns of fault states. The SST generates fault hypothesis efficiently and the FCD resolve the real fault accurately. Frame based knowledge representation and object-oriented programming make diagnostic system general and efficient. Truth maintenance system enables robust pattern matching and provides enhanced explain facilities. A prototype expert system for supports operation of naphtha furnaces process, called OASYS, has been built and tested to demonstrate this methodology. Utilization of diversified process symbolic data, produced using dynamic normal standards, overcomes the problem of qualitative Boolean reasoning and enhance the applicability.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.1165-1168
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• 2003

In this paper, a CLB-based CPLD low-power technology mapping algorithm is proposed. To perform low power technology mapping for CPLD, a given Boolean network have to be represented to DAG. The proposed algorithm are consist of three step. In the first step, TD(Transition Density) calculation have to be performed. In the second step, the feasible clusters are generated by considering the following conditions: the number of output, the number of input and the number of OR-terms for CLB(Common Logic Block) within a CPLD. The common node cluster merging method, the node separation method, and the node duplication method are used to produce the feasible clusters. In the final step, low power technology mapping based on the CLBs is packing the feasible clusters into the several proper CLBs. Therefore the proposed algorithm is proved an efficient algorithm for a low power CPLD technology mapping.

• 대한기계학회논문집A
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• 제31권9호
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• pp.960-966
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• 2007

High-efficient machining, which means to machine a part in the least amount of time, is the most effective tool to improve productivity. In this study, a new feed optimization method based on virtual manufacturing was proposed to realize the high-efficient machining in turning process through the cutting power regulation. The cutting area was evaluated by using the Boolean intersection operation between the cutting tool and workpiece. And the cutting force and power were predicted from the cutting parameters such as feed, depth of cut, spindle speed, specific cutting force, and so on. Especially, the reliability of the proposed optimization method was validated by comparing the predicted and measured cutting forces. The simulation results showed that the proposed optimization method could effectively enhance the productivity in turning process.