• Title/Summary/Keyword: Block frequency

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A Study on Pulse Shaping of Linear Phase filter block with Variable Cutoff Frequency in PCM/FM transmission (PCM/FM 전송에서 가변 컷오프 특성을 갖는 선형위상 필터 블록의 펄스 성형에 관한 연구)

  • Lee Sang-Rae;Ra Sung-Woong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.1C
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    • pp.65-73
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    • 2006
  • The purpose of this study is to design and analyze the pre-modulation filter with the variable -3dB cutoff frequency and linear phase response for bandlimiting the allocation of radio frequency bandwidth in PCM/FM transmission system. For the implementation of this required filter, the digital FIR filter, DAC and variable 2nd order LPF have been constructed with the filter block which designed and analyzed by each stage in order to satisfy the attenuation characteristic requirement of the analog 7th order bessel filter. The paper also concerned the linear phase properties for the filter block. Especially we have carried out the linear phase simulation with real parts for variable 2nd order LPF and compared this simulation results with the one of the fixed bandwidth 2nd order bessel filter for validating the linear phase requirement.

Performance of MIMO-OFDM Systems for Underwater Communications (수중 통신 환경에서의 MIMO-OFDM 시스템 성능 분석)

  • Han, Dong-Keol;Hui, Bing;Chang, Kyung-Hi;Byun, Sung-Hoon;Kim, Sea-Moon;Lim, Yong-Kon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.10a
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    • pp.597-599
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    • 2010
  • In this paper, by considering the real UWA channel environments, the measured channel data is used to generate the UWA channel model and calculate the relative parameters for underwater OFDM systems. Practical least square (LS) based channel estimation with linear interpolation are adopted to obtain the channel state information (CSI) at receiver side. As multi-input multi-output (MIMO) processing techniques, Alamouti code is implemented and evaluated to perform for space time block coding (STBC) and space frequency block coding (SFBC) for UWA OFDM systems with the MIMO configuration of $2{\times}1$, at the same time, $1{\times}2$ maximum ratio combining (MRC) is performed for the purpose of comparison. The simulation results show that, with perfect channel estimation, SFBC failed to work duo to the serious frequency selectivity of UWA channel environments. When the practical channel estimation is applied, in the case of STBC, the proposed 4-column pilot pattern gives better performance about 7dB than SISO system.

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Blocking Artifacts Detection in Frequency Domain for Frame Rate Up-conversion (프레임율 변환을 위한 주파수 영역에서의 블로킹 현상 검출)

  • Kim, Nam-Uk;Jun, Dongsan;Lee, Jinho;Lee, Yung-Lyul
    • Journal of Broadcast Engineering
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    • v.21 no.4
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    • pp.472-483
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    • 2016
  • This paper proposes a blocking artifacts detection algorithm in frequency domain for MC-FRUC (Motion Compensated Frame Rate Up-Conversion). Conventional MC-FRUC algorithms occur blocking artifacts near interpolated block boundaries since motion compensation is performed from block-based motion vector. For efficiently decreasing blocking artifacts, this paper analyses frequency characteristics of the interpolated frame and reduces blocking artifacts on block boundaries. In experimental results the proposed method shows better subjective quality than some conventional FRUC method and also increases the PSNR(Peak Signal to Noise Ratio) value on average 0.45 dB compared with BDMC(Bi-Directional Motion Compensation).

Fast Intra Mode Selection Algorithm for H.264/AVC Using Constraints of Frequency Characteristics (주파수 특성의 제약 조건들을 이용한 H.264/AVC를 위한 고속 화면 내 모드 선택 방법)

  • Jin, Soon-Jong;Park, Sang-Jun;Jeong, Je-Chang
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.4C
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    • pp.321-329
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    • 2008
  • H.264/AVC video coding standard enables a considerably higher improvement in coding efficiency compared with previous standards such as MPEG-2, H.263 and MPEG-4. To achieve this, for each macro-block in H.264/AVC, Rate-Distortion Optimization (RDO) technique is employed to select the best motion vector, reference frame, and macro-block mode. As a result, computational complexity is increased significantly whereas RDO achieve higher improvement. This paper presents fast intra mode selection algorithm based on constraints of frequency characteristics which are derived from intra coding modes of H.264/AVC. First of all, we observe the features of each intra mode through the frequency analysis of image. And then proposed Frequency Error Costs (FECs) are calculated to select the best mode which has minimum cost. Computational complexity is considerably reduced because rate-distortion costs only calculate the candidate modes which are set of best mode and its neighbouring two modes. Experimental results show that proposed algorithm reduces the complexity dramatically maintaining the rate-distortion performance compared with H.264/AVC reference software.

Current to Voltage Converter for Low power OFDM modem (저전력 OFDM 모뎀 구현을 위한 IVC설계)

  • Kim, Seong-Kweon
    • The Journal of the Korea institute of electronic communication sciences
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    • v.3 no.2
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    • pp.86-92
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    • 2008
  • Othogonal Frequency Division Multiplexing(OFDM) has been taken notice of 4th generation communication method because it has a merit of high data rate(HDR). To realize HDR communication, The OFDM a s high efficient Fast-Fourier-Transform (FFT)/Inversion FFT (IFFT) processor. Currently OFDM is realized by Digital Signal Processor(DSP) but it consumes a lot of Power. Therefore, current-mode FFT LSI has been proposed for compensation of this demerit. In this paper, we propose IVC for current-mode FFT LSI. From the simulation result, the output value of IVC is more than 3V when the value of FFT Block output is more than $7.35{\mu}A$. The output value of IVC is lower than 0.5V when the value of FFT Block output is lower than $0.97{\mu}A$. Designed IVC Low-power Current mode FFT LSI will contribute to the operation of current-mode FFT LSI and the development of next generation wireless communication systems.

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Information Coding Schemes for the Frequency Hopping Communication (주파수 도약 통신에 적합한 정보부호화 기법)

  • 박대철;김용선;한성우;전용억;전병민
    • Journal of Broadcast Engineering
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    • v.4 no.1
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    • pp.32-43
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    • 1999
  • This paper addresses schemes which securely transmit voice and data information under the worst communication environment using the frequency hopping(FH) communication system to avoid monitoring or interference against enemy. In case of using the conventional FEC and bit interleaving scheme. the processing time for error control coding and bit interleaving due to system complexity is highly demanded. In this paper. the effective information coding scheme of maprity error correction and block interleaving compatible to the proposed FH communication system is proposed to transmit voice or data (I6Kbps. 4.8Kbps. 2.4Kbps. 1.2Kbps, O.6Kbps) under the worst FH communication channel. In transmitter. low rate data signals are configured to majority data blocks. and transmitted repeatedly to FH channel which are structured to 20Kbps hopping frame cells. In receiver. the received data are decoded block by block, and taken majority error correction. Consequently. burst or random errors are corrected at the block deinterleaver and the majority decoder. The proposed coder structure reduces the coding/decnding processing time as well as the jamming interferences, and further simplify the data processing complexity for FH communication. Improved performance of the proposed scheme was verified under simulated channel environments.

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Design of a Low Power 3V 6-bit 100MSPS CMOS ADC for DBS Receiver (위성방송 수신기용 저전력 3V 6-bit 100MSPS COMS ADC의 설계)

  • Moon, Jae-Jun;Song, Min-Kyu
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.12
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    • pp.20-26
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    • 1999
  • A CMOS 6-bit 100MSPS ADC for DBS receiver is designed. The proposed ADC is composed of folding block, latch block, and digital block. The cascode interpolating block and kickback reduced latch are proposed with a high speed architecture. To verify the performance of ADC, simulations are carried out by HSPICE. The ADC achieves a clock frequency of 100MHz with a power dissipation of 40mW for 3 V supply voltage. The active chip area is $1500{\mu}m{\times}1000{\mu}m$with $0.65{\mu}m$ 2-poly 2-metal CMOS process. Further, INL and DNL are within ${\pm}0.6LSB$, ${\pm}0.5LSB$, respectively. SNDR is about 33dB at 10MHz input frequency.

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Reliability Analysis for Fatigue Damage of Steel Bridge Details (강교 부재의 피로손상에 대한 신뢰성 해석)

  • Park, Yeon Soo;Han, Suk Yeol;Suh, Byoung Chal
    • Journal of Korean Society of Steel Construction
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    • v.15 no.5 s.66
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    • pp.475-487
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    • 2003
  • This study developed an analysis model of estimating fatigue damage using the linear elastic fracture mechanics method. Stress history occurring to an element when a truck passed over a bridge was defined as block loading and crack closure theory explaining load interaction effect was applied. Stress range frequency analysis considering dead load stress and crack opening was done. Probability of stress range frequency distribution was applied and the probability distribution parameters were estimated. The Monte Carlo simulation of generating the probability various of distribution was performed. The probability distribution of failure block numbers was obtained. With this the fatigue reliability of an element not occurring in failure could be calculated. The failure block number divided by average daily truck traffic remains the life of a day. Fatigue reliability analysis model was carried out for the welding member of cross beam flange and vertical stiffener of steel box bridge using the proposed model. Consequently, a 3.8% difference was observed between the remaining life in the peak analysis method and in the proposed analysis model. The proposed analysis model considered crack closure phase and crack retard.

An invisible watermarking scheme using the SVD (특이치 분해를 이용한 비가시적 워터마크 기법)

  • 유주연;유지상;김동욱;김대경
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.11C
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    • pp.1118-1122
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    • 2003
  • In this paper, we propose a new invisible digital watermarking scheme based on wavelet transform using singular value decomposition. Embedding process is started by decomposing the lowest frequency band image with 3${\times}$3 block among which we define the watermark block chosen by a key set; entropy and condition number of the block. A watermark is embedded in the singular values of each watermark blocks. This provides a robust watermarking in lowest possible time-frequency domain. To detect the watermark, we are locally modeling an attack as 3${\times}$3 matrices on the watermark blocks. Combining with the SVD and the attack matrices, we estimate watermark set corresponding to the watermark blocks. In each watermark block, we determine an optimal watermark which is justified by the T-testing. A numerical experiment shows that the proposed watermarking scheme efficiently detects the watermarks from several JPEG attacks.

Test Patterns for Asynchronous Multiple-Access Frequency-Hopped Spread-Spectrum Systems (비동기 다원접속 주파수도약 확산대역 시스템을 위한 테스트 패턴)

  • Lee, Jae-Hong;Stark, Wayne E.;Oh, Sang-Hyun
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.3
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    • pp.40-49
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    • 1989
  • A variable-state block interference channel model is presented which matches asynchronous multiple-access slow frequency-hopped spread-spectrum systems which suffer from bursts of interference of variable duration. For variable-state block interference channels test pattern techniques combined with interleaving are presented from which the decoder obtain side information about channel states. By examining test patterns the decoder estimates which parts of data blocks are affected by interference and regards the parts of blocks affected by interference as erasures. Since the presence of test patterns reduces the number of bits for data transmission, test patterns are not useful for variable-state block interference channels for small hit probability, It is shown that test patterns increase the capacities of variable-state block interference channels for large hit probability. It is also shown that test patterns provide a almost full side information about channel states for certain values of parameters.

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