• Title/Summary/Keyword: Block Based Information

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Performance A Analysis of OFDM/QPSK-DMR System Using BL-PSF over Microwave Channel Environments (Microwave 채널환경에서 BL-PSF를 적용하는 OFDM/QPSK-DMR 시스템의 성능분석)

  • Ahn, Jun-bae;Yang, Hee-jin;Oh, Chang-heon;Cho, Sung-joon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.9C
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    • pp.1279-1288
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    • 2004
  • In this paper, the DMR(Digital Microwave Radio) system-based OFDM(Orthogonal Frequency Division Multiplexing) scheme in microwave channel environments has been proposed and system performances have been evaluated. The existing single carrier DMR system has a complex system structure due to using high-level QAM(Quadrature Amplitude Modulation) modulation scheme and so charmel capacity is limited by sensitive effects from fading. Therefore, in the proposed DMR system, it uses that the OFDM scheme for enhancement of fading distortion and also uses that the band-limited pulse shaping filter instead of windowing for no additional data such as GI/GB and for using efficient of IFFT/FFT block. The performance of OFDM/QPSK-DMR system and single carrier DMR system are analysed by computer simulation using two-ray model under the microwave channel environments The computer simulation results confirm that the fade margin of the proposed OFDM/QPSK-DMR system is highly increased as the number of sub-carriers is larger.

A Creative Solution of Distributed Modular Systems for Building Ubiquitous Heterogeneous Robotic Applications

  • Ngo Trung Dung;Lund Henrik Hautop
    • Proceedings of the IEEK Conference
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    • summer
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    • pp.410-415
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    • 2004
  • Employing knowledge of adaptive possibilities of agents in multi-agents system, we have explored new aspects of distributed modular systems for building ubiquitous heterogeneous robotic systems using intelligent building blocks (I-BLOCKS) [1] as reconfigurable modules. This paper describes early technological approaches related to technical design, experimental developments and evaluation of adaptive processing and information interaction among I-BLOCKS allowing users to easily develop modular robotic systems. The processing technology presented in this paper is embedded inside each $DUPLO^1$ brick by microprocessor as well as selected sensors and actuators in addition. Behaviors of an I-BLOCKS modular structure are defined by the internal processing functionality of each I-Block in such structure and communication capacities between I-BLOCKS. Users of the I-BLOCKS system can easily do 'programming by building' and thereby create specific functionalities of a modular robotic structure of intelligent artefacts without the need to learn and use traditional programming language. From investigating different effects of modern artificial intelligence, I-BLOCKS we have developed might possibly contain potential possibilities for developing modular robotic system with different types of morphology, functionality and behavior. To assess these potential I-BLOCKS possibilities, the paper presents a limited range of different experimental scenarios in which I-BLOCKS have been used to set-up reconfigurable modular robots. The paper also reports briefly about earlier experiments of I-BLOCKS created on users' natural inspiration by a just defined concept of modular artefacts.

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A Design of FPGA Self-test Circuit Reusing FPGA Boundary Scan Chain (FPGA 경계 스캔 체인을 재활용한 FPGA 자가 테스트 회로 설계)

  • Yoon, Hyunsik;Kang, Taegeun;Yi, Hyunbean
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.6
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    • pp.70-76
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    • 2015
  • This paper introduces an FPGA self-test architecture reusing FPGA boundary scan chain as self-test circuits. An FPGA boundary scan cell is two or three times bigger than a normal boundary scan cell because it is used for configuring the function of input/output pins functions as well as testing and debugging. Accordingly, we analyze the architecture of an FPGA boundary scan cell in detail and design a set of built-in self-test (BIST) circuits in which FPGA boundary scan chain and a small amount of FPGA logic elements. By reusing FPGA boundary scan chain for self-test, we can reduce area overhead and perform a processor based on-board FPGA testing/monitoring. Experimental results show the area overhead comparison and simulation results.

Hierarchical Fast Mode Decision Algorithm for Intra Prediction in HEVC (HEVC 화면 내 예측을 위한 계층적 고속 모드 결정 알고리즘)

  • Kim, Tae Sun;Sunwoo, Myung Hoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.6
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    • pp.57-61
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    • 2015
  • This paper proposes a fast intra prediction algorithm for the High Efficiency Video Coding (HEVC). HEVC has 35 modes, such as DC mode, Planar mode, and 33 angular modes for the intra-prediction. To reduce the complexity and to support fast decision for intra prediction, this paper proposes a hierarchical mode decision method (HMD). The proposed HMD mainly focuses on how to reduce the number of prediction modes. The experimental results show that the proposed HMD can reduce the encoding time about 39.17% with little BDBR loss. On average, the proposed HMD can achieve the encoding time saving e about 14.13 ~ 19.37% compared to that of the existing algorithms with slightly increasing 0.01 ~ 0.42% BDBR.

Digital Video Watermarking Using Block Reordering Algorithm Based on DCT (DCT 기반의 블록 재정렬 알고리즘을 이용한 디지털 비디오 워터마킹)

  • Kim Kyoung-Sik;Park Kyung-Jun;Ko Hyung Hwa
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.7C
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    • pp.696-705
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    • 2005
  • The rapid progress of the software has enabled individuals to copy and remake digital contents, which was only done by professionals. However, this rapid growth of software has brought many other defects. As a solution to the problems, contents producer needs to have certification and inspection of its contents text and hold the proprietary rights. In this paper, the new video watermarking scheme is proposed which is appropriate for the requirements mentioned for digital video contents and it is applied to MPEG-2 video encoder and decoder. In order to insert watermark sequence for digital video data, watermarking used blocks reordering algorithm and SCL(secret code list). It is satisfied two properties of cryptography that confidentiality and integrity. We test the proposed algorithm to see its performance in terms of watermark capacity, compression robustness and visual quality impact. According to the experiment of proposed watermarking algorithm, we obtained satisfactory results that watermark can still be extracted after MPEG-2 re-encoding at lower bit rates. It is important property for data hiding and user authentication in video data.

A Study on the Multiresolutional Coding Based on Spline Wavelet Transform (스플라인 웨이브렛 변환을 이용한 영상의 다해상도 부호화에 관한 연구)

  • 김인겸;정준용;유충일;이광기;박규태
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.12
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    • pp.2313-2327
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    • 1994
  • As the communication environment evolves, there is an increasing need for multiresolution image coding. To meet this need, the entrophy constratined vector quantizer(ECVQ) for coding of image pyramids by spline wavelet transform is introduced in this paper. This paper proposes a new scheme for image compression taking into account psychovisual feature both in the space and frequency domains : this proposed method involves two steps. First we use spline wavelet transform in order to obtain a set of biorthogonal subclasses of images ; the original image is decomposed at different scale using a pyramidal algorithm architecture. The decomposition is along the vertical and horizontal directions and maintains constant the number of pixels required the image. Second, according to Shannon's rate distortion theory, the wavelet coefficients are vectored quantized using a multi-resolution ECVQ(entropy-constrained vector quantizer) codebook. The simulation results showed that the proposed method could achieve higher quality LENA image improved by about 2.0 dB than that of the ECVQ using other wavelet at 0.5 bpp and, by about 0.5 dB at 1.0 bpp, and reduce the block effect and the edge degradation.

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Turbo-coded STC schemes for an integrated satellite-terrestrial system for cooperative diversity (협동 다이버시티 이득을 위한 위성-지상간 통합망에서의 터보 부호화된 시공간 부호)

  • Park, Un-Hee;Kim, Soo-Young;Kim, Hee-Wook;Ahn, Do-Seob
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.1A
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    • pp.62-70
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    • 2010
  • In this paper, we evaluate the performance of various diversity techniques which can contribute to provide efficient multimedia broadcasting services via hybrid/integrated satellite and terrestrial network. Space-time coding (STC) can achieve the diversity gain in a multi-path environment without additional bandwidth requirement. Recent study results reported that satellite systems can achieve high diversity gains by appropriate utilization of STC and/or forward error correction schemes. Based on these previous study results, we present various cooperative diversity techniques by combining STC and rate compatible turbo codes in order to realize the transmit diversity for the mobile satellite system. The satellite and several terrestrial repeaters operate in unison to send the encoded signals, so that receiver may realize diversity gain. The results demonstrated in this paper can be utilized in future system implementation.

Performance Comparison of Space-Time Block Coding in High-speed Railway Channel (고속 철도 채널 환경에서 시공간 블록 부호 성능 비교)

  • Park, Seong-Guen;Lee, Jong-Woo;Jeon, Taehyun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39C no.3
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    • pp.291-297
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    • 2014
  • Due to the rapid increase in demand for transportation of human and freight in modern railway systems, the CBTC system has been proposed, which is the solution for improvement of the line capacity that has been limited by the conventional track circuit based train control system. In the CBTC system, higher reliability of the communication system should be guaranteed for the safety of passengers and trains. However, due to the inherent characteristics of the wireless channel environment, performance degradations are inevitable. The diversity techniques can increase the reliability of data transmission using multiple antennas. In this paper, we investigate the performance of the STBC in the railway channel environment. Rician fading model is used for the viaduct scenarios which take important roles in the railway system. Also, considered is the Doppler effect which is an important factor in the mobile communication system. Simulations are performed to analyze the performance of the STBC in various channel environments. Results show that the performance degradation due to the phase error in viaduct scenarios is independent of the diversity order but is affected by the constellation of the modulation.

A Hardware Architecture of Regular Expression Pattern Matching for Deep Packet Inspection (심층 패킷검사를 위한 정규표현식 패턴매칭 하드웨어 구조)

  • Yun, Sang-Kyun;Lee, Kyu-Hee
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.5
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    • pp.13-22
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    • 2011
  • Network Intrusion Detection Systems use regular expression to represent malicious packets and hardware-based pattern matching is required for fast deep packet inspection. Although hardware architectures for implementing constraint repetition operators such as {10} were recently proposed, they have some limitation. In this paper, we propose hardware architecture supporting constraint repetitions of general regular expression sub-patterns with lower logic complexity. The subpatterns supported by the proposed contraint repetition architecture include general regular expression patterns as well as a single character and fixed length patterns. With the proposed building block, we can implement more efficiently regular expression pattern matching hardwares.

Development of Game Programming Education Model 4E for Pre-Service Teachers (예비교사를 위한 게임 프로그래밍 교육모델 4E 개발)

  • Sung, Younghoon
    • Journal of The Korean Association of Information Education
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    • v.23 no.6
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    • pp.561-571
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    • 2019
  • Programming education generally includes problem analysis process, automation through algorithms and programming, and generalization process. It is a good software education method for students in improving computing thinking. However, it was found that beginners had difficulties in understanding instruction usage, writing algorithms, and implementing programming. In this study, we developed a game programming education model and curriculum for programming education of pre-service teachers. The 4E model consisted of empathy, exploration, engagement and evaluation. In addition, it is configured to learn game core elements and core command blocks by each stage. To help the pre-service teachers understand the use of various programming blocks, a three-step teaching and learning method was presented, consisting of example learning, self-game creation, and team-based projects. As a result of applying and verifying the curriculum for 15 weeks, it showed significant results in the 4E model and pre-service teachers' perception of block programming competence and the level of computational thinking on the submitted game project results was also high.