• Title/Summary/Keyword: Binary Tree algorithm

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Fast Anti-Collision Algorithm Using Pre-distributed Random Address (미리 분배된 난수를 이용하는 빠른 충돌방지 알고리즘)

  • Kang Jeon il;Park Ju sung;Nyang Dae hun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.3A
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    • pp.184-194
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    • 2005
  • One of the most important factors that decide the overall performance of RFID system is anti-collision algorithm. By enhancing the anti-collision algorithm, we can increase the number of RFID tags that can be processed in unit time. Two anti-collision algorithms are most widely prevailed: one is ALOHA-based protocol and the other is a binary tree walking method, but these are still under research. In this paper, we suggest an anti-collision algorithm named AAC(Address Allocating and Calling) using pre-distributed random address, which is much faster and more efficient than existing ones. Finally, we evaluate our scheme using mathematical analysis and computer simulation.

Multi-Interval Discretization of Continuous-Valued Attributes for Constructing Incremental Decision Tree (증분 의사결정 트리 구축을 위한 연속형 속성의 다구간 이산화)

  • Baek, Jun-Geol;Kim, Chang-Ouk;Kim, Sung-Shick
    • Journal of Korean Institute of Industrial Engineers
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    • v.27 no.4
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    • pp.394-405
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    • 2001
  • Since most real-world application data involve continuous-valued attributes, properly addressing the discretization process for constructing a decision tree is an important problem. A continuous-valued attribute is typically discretized during decision tree generation by partitioning its range into two intervals recursively. In this paper, by removing the restriction to the binary discretization, we present a hybrid multi-interval discretization algorithm for discretizing the range of continuous-valued attribute into multiple intervals. On the basis of experiment using semiconductor etching machine, it has been verified that our discretization algorithm constructs a more efficient incremental decision tree compared to previously proposed discretization algorithms.

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A Hierarchical Packet Classification Algorithm Using Set-Pruning Binary Search Tree (셋-프루닝 이진 검색 트리를 이용한 계층적 패킷 분류 알고리즘)

  • Lee, Soo-Hyun;Lim, Hye-Sook
    • Journal of KIISE:Information Networking
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    • v.35 no.6
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    • pp.482-496
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    • 2008
  • Packet classification in the Internet routers requires multi-dimensional search for multiple header fields for every incoming packet in wire-speed, hence packet classification is one of the most important challenges in router design. Hierarchical packet classification is one of the most effective solutions since search space is remarkably reduced every time a field search is completed. However, hierarchical structures have two intrinsic issues; back-tracking and empty internal nodes. In this paper, we propose a new hierarchical packet classification algorithm which solves both problems. The back-tracking is avoided by using the set-pruning and the empty internal nodes are avoided by applying the binary search tree. Simulation result shows that the proposed algorithm provides significant improvement in search speed without increasing the amount of memory requirement. We also propose an optimization technique applying controlled rule copy in set-pruning.

A Study on the Hybrid Algorithm for Scene Change Detection (장면전환검출을 위한 Hybrid 알고리즘에 관한 연구)

  • 이문우;박종운;장종환
    • Journal of the Korea Computer Industry Society
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    • v.2 no.4
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    • pp.507-520
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    • 2001
  • In this paper, a hybrid algorithm for well detecting both abrupt and gradual scene changes is proposed. This algorithm examines only the candidate intervals for speedup using the binary tree method and skips the intervals that are not candidate. For accuracy, the temporal difference of variance is used to detect the gradual scene changes while the temporal difference of histogram is used to detect the abrupt scene changes. Experimental results show that the proposed hybrid algorithm using the binary tree method works up about 10 times faster that the sequential method and is effective in detecting abrupt scene change and gradual transitions including dissolving and fading.

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A Semi-blind Digital Watermarking Scheme Based on the Triplet of Significant Wavelet Coefficients

  • Chu, Hyung-Suk;Batgerel, Ariunzaya;An, Chong-Koo
    • Journal of Electrical Engineering and Technology
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    • v.4 no.4
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    • pp.552-558
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    • 2009
  • We proposed a semi-blind digital image watermarking technique for copyright protection. The proposed algorithm embedded a binary sequence watermark into significant wavelet coefficients by using a quantization method. The main idea of the quantization method was to quantize a middle coefficient of the triplet of a significant wavelet coefficient according to the watermark's value. Unlike an existing algorithm, which used a random location table to find a coefficient in which the watermark bit will be embedded: the proposed algorithm used quad-tree decomposition to find a significant wavelet coefficient for embedding. For watermark detection, an original host image was not required. Thanks to the usage of significant wavelet coefficients, the proposed algorithm improved the correlation value, up to 0.43, in comparison with the existing algorithm.

A 0.5-2.0 GHz Dual-Loop SAR-controlled Duty-Cycle Corrector Using a Mixed Search Algorithm

  • Han, Sangwoo;Kim, Jongsun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.2
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    • pp.152-156
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    • 2013
  • This paper presents a fast-lock dual-loop successive approximation register-controlled duty-cycle corrector (SARDCC) circuit using a mixed (binary+sequential) search algorithm. A wider duty-cycle correction range, higher operating frequency, and higher duty-cycle correction accuracy have been achieved by utilizing the dual-loop architecture and the binary search SAR that achieves the fast duty-cycle correcting property. By transforming the binary search SAR into a sequential search counter after the first DCC lock-in, the proposed dual-loop SARDCC keeps the closed-loop characteristic and tracks variations in process, voltage, and temperature (PVT). The measured duty cycle error is less than ${\pm}0.86%$ for a wide input duty-cycle range of 15-85 % over a wide frequency range of 0.5-2.0 GHz. The proposed dual-loop SARDCC is fabricated in a 0.18-${\mu}m$, 1.8-V CMOS process and occupies an active area of $0.075mm^2$.

A Noise De-Noising Technique using Binary-Tree Non-Uniform Filter Banks and Its Realization (이진트리 비 균일 필터뱅크를 이용한 잡음감소기법 및 구현)

  • Sohn, Sang-Wook;Choi, Hun;Bae, Hyeon-Deok
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.5
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    • pp.94-102
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    • 2007
  • In de-noising, it is wellknown that wavelet-thresholding algorithm shows near-optimal performances in the minimax sense. However, the wavelet-thresholding algorithm is difficult in realization it on hardware, such as FPGA, because of wavelet function complexity. In this paper, we present a new do-noising technique with the binary tree structured filter bank, which is based on the signal power ratio of each subbands to the total signal power. And we realize it on FPGA. For simple realization, the filter banks are designed by Hadamard transform coefficients. The simulation and hardware experimental results show that the performance of the proposed method is similar with that of soft thresholding de-noising algorithm based on wavelets, nevertheless it is simple.

Two-dimensional Binary Search Tree for Packet Classification at Internet Routers (인터넷 라우터에서의 패킷 분류를 위한 2차원 이진 검색 트리)

  • Lee, Goeun;Lim, Hyesook
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.6
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    • pp.21-31
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    • 2015
  • The Internet users want to get real-time services for various multi-media applications. Network traffic rate has been rapidly increased, and data amounts that the Internet has to carry have been exponentially increased. A packet is the basic unit in transferring data at the Internet, and packet classification is one of the most challenging functionalities that routers should perform at wire-speed. Among various known packet classification algorithms, area-based quad-trie (AQT) algorithm is one of the efficient algorithms which can lookup five header fields simultaneously. As a representative space decomposition algorithm, the AQT requires a small amount of memory in storing classification rules, but it does not provide high-speed classification performance. In this paper, we propose a new packet classification algorithm by applying a binary search for the codewords of the AQT to overcome the issue of the AQT. Throughout simulation, it is shown that the proposed algorithm provides a better performance than the AQT in the number of rule comparisons with each input packet.

A study on object recognition using morphological shape decomposition

  • Ahn, Chang-Sun;Eum, Kyoung-Bae
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 1999.05a
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    • pp.185-191
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    • 1999
  • Mathematical morphology based on set theory has been applied to various areas in image processing. Pitas proposed a object recognition algorithm using Morphological Shape Decomposition(MSD), and a new representation scheme called Morphological Shape Representation(MSR). The Pitas's algorithm is a simple and adequate approach to recognize objects that are rotated 45 degree-units with respect to the model object. However, this recognition scheme fails in case of random rotation. This disadvantage may be compensated by defining small angle increments. However, this solution may greatly increase computational complexity because the smaller the step makes more number of rotations to be necessary. In this paper, we propose a new method for object recognition based on MSD. The first step of our method decomposes a binary shape into a union of simple binary shapes, and then a new tree structure is constructed which ran represent the relations of binary shapes in an object. finally, we obtain the feature informations invariant to the rotation, translation, and scaling from the tree and calculate matching scores using efficient matching measure. Because our method does not need to rotate the object to be tested, it could be more efficient than Pitas's one. MSR has an intricate structure so that it might be difficult to calculate matching scores even for a little complex object. But our tree has simpler structure than MSR, and easier to calculated the matchng score. We experimented 20 test images scaled, rotated, and translated versions of five kinds of automobile images. The simulation result using octagonal structure elements shows 95% correct recognition rate. The experimental results using approximated circular structure elements are examined. Also, the effect of noise on MSR scheme is considered.

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Improving RFID Anti-Collision Algorithms with Multi-Packet Reception (다중 패킷 수신을 이용한 RFID 충돌방지 알고리즘의 성능 향상)

  • Lee, Jeong-Keun;Kwon, Taek-Young;Choi, Yang-Hee;Kim, Kyung-Ah
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.11A
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    • pp.1130-1137
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    • 2006
  • One of the important performance issues in large-scale RFID systems is to resolve collisions among responses from RFID tags. Considering two do facto anti-collision solutions, namely the binary-tree splitting algorithm and the Slotted-Aloha algorithm, we propose to use multi-packet reception (MPR) capability to enhance the RFID tag reading rate (i.e., throughput). MPR allows an RFID reader to receive multiple reponses transmitted by tags at the same time. We analyze the effect of MPR capability in the above anti-collision algorithms, which is also validated by simulation. The analysis and simulation results show that RFID reader antenna design and signal separation techniques play an important role in improving RFID system performance with MPR capability.