• The Transactions of the Korea Information Processing Society
• /
• v.7 no.1
• /
• pp.306-312
• /
• 2000

In this paper, the efficient architecture of small Reed-solomon architecture is suggested. Here, 3-stage pipeline is adopted. In decoding, error-location polynomials are obtained by BMA using fast iteration method, and syndrome polynomials, where calculation complexity is required, are obtained by parallel calculation using ROM table, and the roots of error location polynomial are calculated by ROM table using Chein search algorithm. In the suggested decoder, it is confirmed that 3 symbol random errors can be corrected and 124Mbps decoding rate is obtained using 25 Mhz system clock.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.10 no.3
• /
• pp.193-202
• /
• 2010

This paper presents a high-speed low-complexity pipelined Reed-Solomon (RS) (255,239) decoder using pipelined reformulated inversionless Berlekamp-Massey (pRiBM) algorithm and its folded version (PF-RiBM). Also, this paper offers efficient pipelining and folding technique of the RS decoders. This architecture uses pipelined Galois-Field (GF) multipliers in the syndrome computation block, key equation solver (KES) block, Forney block, Chien search block and error correction block to enhance the clock frequency. A high-speed pipelined RS decoder based on the pRiBM algorithm and its folded version have been designed and implemented with 90-nm CMOS technology in a supply voltage of 1.1 V. The proposed RS(255,239) decoder operates at a clock frequency of 700 MHz using the pRiBM architecture and also operates at a clock frequency of 750 MHz using the PF-RiBM, respectively. The proposed architectures feature high clock frequency and low-complexity.

• Journal of Integrative Natural Science
• /
• v.1 no.2
• /
• pp.149-159
• /
• 2008

We develop two algorithms that nd a minimal polynomial of a finite sequence. One uses Euclid's algorithm, and the other is in essence a minimal polynomial version of the Berlekamp-Massey algorithm. They are formulated naturally and proved algebraically using polynomial arithmetic. They connects up seamlessly with decoding procedure of alternant codes.

• Proceedings of the KIEE Conference
• /
• 1999.07g
• /
• pp.3212-3214
• /
• 1999

RS(Reed-Solomon)부호는 오류 정정을 위한 채널 코딩기법중의 하나로 특히 연집 오류에 대해 강한 특성을 갖고 있으며, CD-P(Compact Disc Player), DAT(Digital Audio Tape). VTR, DVD(Digital Video Disc), 디지탈 TV 디코더등에서 사용되고 있다. 본 논문은 Galois Field, GF[$2^8$]상에서 (204. 188. 8)의 규격을 갖는 디지탈 TV용 RS 복호기의 구현에 관한 연구로 8개의 심볼 오류까지 정정 가능하다. 오증 계산은 16개의 오증 계산셀로 구성되어 지며, 오류 위치 다항식을 계산하는데 있어서는 Berlekamp-Massey 알고리즘을 사용한다. VHDL로 설계되어 Synopsys를 이용하여 검증 및 합성하였다.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.26 no.2
• /
• pp.10-17
• /
• 1989

The Berlekamp-Massey algorithm, the method of using the Euclid algorithm, and Fourier transforms over a finite field can be used for the decoding of Reed-Solomon codes (called RS codes). RS codes can also be decoded by the algorithm that was developed by Peterson and refined by the Gorenstein and Zierler. However, the decoding of RS codes using the Peterson-Gorenstein-Zieler algorithm offers sometimes computational or implementation advantages. The decoding procedure of the double-error correcting (31,27) Rs code over the symbol field GF ($2^5$) will be analyized in this paper. The complete analysis, gate array design, and implementation for encoder/decoder pair of (31.27)RS code are performed with a strong theoretical justification.

• Journal of the Korean Institute of Telematics and Electronics C
• /
• v.36C no.1
• /
• pp.34-40
• /
• 1999

Reed-Solomon(RS) codes have been employed to correct burst errors in applications such as CD-ROM, HDTV, ATM and digital VCRs. For the decoding RS codes, the Berlekamp-Massey algorithm, Euclidean algorithm and modified Euclidean algorithm(MEA) have been developed among which the MEA becomes the most popular decoding scheme. We propose an efficient recursive cell architecture suitable for the MEA. The advantages of the proposed scheme are twofold. First, The proposed architecture uses about 25% less clock cycles required in the MEA operation than[1]. Second, the number of recursive MEA cells can be reduced, when the number of clock cycles spent in the MEA operation is larger than code word length n. thereby buffer requirement for the received words can be reduced. For demonstration, the MEA circurity for (128,124) RS code have been described and the MEA operation is verified through VHDL.

• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.28B no.10
• /
• pp.799-806
• /
• 1991

Utilizing dual basis, normal basis, and subfield representation, three different finite field multipliers are presented in this paper. First, we propose an extended dual basis multiplier based on Berlekamp's bit-serial multiplication algorithm. Second, a detailed explanation and design of the Massey-Omura multiplier based on a normal basis representation is described. Third, the multiplication algorithm over GF(($2^{n}$) utilizing subfield is proposed. Especially, three different multipliers are designed over the finite field GF(($2^{4}$) and the complexity of each multiplier is compared with that of others. As a result of comparison, we recognize that the extendd dual basis multiplier requires the smallest number of gates, whereas the subfield multiplier, due to its regularity, simplicity, and modularlity, is easier to implement than the others with respect to higher($m{\ge}8$) order and m/2 subfield order.

• 제어로봇시스템학회:학술대회논문집
• /
• 1988.10b
• /
• pp.934-938
• /
• 1988

In this paper we present a method of determining the unknown degree of any 2D discrete linear shift-invariant system which is characterized only by the coefficients of the double power series of a transfer function, i.e. a 2D impulse response array. Our method is based on a 2D extension of Berlekamp-Massey algorithm for synthesis of linear feedback shift registers, and it gives a novel approach to identification and approximation of 2D linear systems, which can be distinguished in its simplicity and potential of applicability from the other 2D Levinson-type algorithms. Furthermore, we can solve problems of 2D Pade approximation and 2D system reduction on a reasonable assumption in the context of 2D linear systems theory.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.14 no.3
• /
• pp.216-226
• /
• 1989

In this paper, we explain about an outline of the decoding method for double encoding system using the error correcting capacitance and a simple decoding method. We have been taken formation two-dimension code word of doubly-encoded code using $C_1$(32, 28, 5) and $C_2$(32, 26, 7) Reed-Solomon codes, and had computer simulation of the erroe correcting processes in frequency domain. On these processes, the newly developed digital signal processing technology such as error correction using Berlekamp-Massey algorithm in frequency domain have been proven.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.26 no.7
• /
• pp.90-97
• /
• 1989

In this paper, we have taken the formation of two-dimension codeword named doubly-encoded code using the Reed-Solomon code, C1(32, 28) with minimum distance 5 and C2(32, 26) with minimum distance 7 and we have had computer simulation of these error correcting processes using modeled R-DAT (Rotationary Digital Audio Tape). As the result, the error rate per symbol has been decreased about 0.05 and on these processes, the newly developed digital signal processing technology such as erro correction using Berlekamp-Massey algorithm in frequency domain have been proven.