• 제목/요약/키워드: Bad Block Table

검색결과 3건 처리시간 0.017초

에러 보정 코드를 이용한 비동기용 대용량 메모리 모듈의 성능 향상 (Performance Improvement of Asynchronous Mass Memory Module Using Error Correction Code)

  • 안재현;양오;연준상
    • 반도체디스플레이기술학회지
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    • 제19권3호
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    • pp.112-117
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    • 2020
  • NAND flash memory is a non-volatile memory that retains stored data even without power supply. Internal memory used as a data storage device and solid-state drive (SSD) is used in portable devices such as smartphones and digital cameras. However, NAND flash memory carries the risk of electric shock, which can cause errors during read/write operations, so use error correction codes to ensure reliability. It efficiently recovers bad block information, which is a defect in NAND flash memory. BBT (Bad Block Table) is configured to manage data to increase stability, and as a result of experimenting with the error correction code algorithm, the bit error rate per page unit of 4Mbytes memory was on average 0ppm, and 100ppm without error correction code. Through the error correction code algorithm, data stability and reliability can be improved.

유효 페이지 색인 테이블을 활용한 NAND Flash Translation Layer 설계 (Design of NAND Flash Translation Layer Based on Valid Page Lookup Table)

  • 신정환;이인환
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 컴퓨터소사이어티 추계학술대회논문집
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    • pp.15-18
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    • 2003
  • Flash memory becomes more important for its fast access speed, low-power, shock resistance and nonvolatile storage. But its native restrictions that have limited 1ifetime, inability of update in place, different size unit of read/write and erase operations need to managed by FTL(Flash Translation Layer). FTL has to control the wear-leveling, address mapping, bad block management of flash memory. In this paper, we focuses on the fast access to address mapping table and proposed the way of faster valid page search in the flash memory using the VPLT(Valid Page Lookup Table). This method is expected to decrease the frequency of access of flash memory that have an significant effect on performance of read and block-transfer operations. For the validations, we implemented the FTL based on Windows CE platform and obtained an improved result.

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자기진단과 시계 기능을 갖는 비동기용 불휘발성 메모리 모듈의 설계 (Design of Asynchronous Nonvolatile Memory Module with Self-diagnosis and Clock Function)

  • 신우현;이강원;양오
    • 반도체디스플레이기술학회지
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    • 제22권1호
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    • pp.43-48
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    • 2023
  • This paper discusses the design of 32Mbyte asynchronous nonvolatile memory modules, which includes self-diagnosis and RTC (Real Time Clock) functions to enhance their data stability and reliability. Nonvolatile memory modules can maintain data even in a power-off state, thereby improving the stability and reliability of a system or device. However, due to the possibility of data error due to electrical or physical reasons, additional data loss prevention methods are required. To minimize data error in asynchronous nonvolatile memory modules, this paper proposes the use of voltage monitoring circuits, self-diagnosis, BBT (Bad Block Table), ECC (Error Correction Code), CRC (Cyclic Redundancy Check)32, and data check sum, data recording method using RTC. Prototypes have been produced to confirm correct operation and suggest the possibility of commercialization.

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