• Title/Summary/Keyword: Background doping concentration (BDC)

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Control of Background Doping Concentration (BDC) for Electrostatic Discharge (ESD) Protection of High Voltage Operating LDI Chip (고전압용 LDI 칩의 정전기 보호를 위한 EDNMOS 소자의 백그라운드 도핑 특성)

  • Seo, Yong-Jin;Kim, Kil-Ho;Lee, Woo-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.140-141
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    • 2006
  • Background doping concentration (BDC) is proven to be a critical factor to affect the high current behavior of the extended drain NMOSFET (EDNMOS) devices. The EDNMOS device with low BDC suffers from strong snapback in the high current region, which results in poor electrostatic discharge (ESD) protection performance and high latchup risk. However, the strong snapback can be avoided in the EDNMOS device with high BDC. This implies that both the good ESD protection performance and the latchup immunity can be realized in terms of the EDNMOS by properly controlling its BDC.

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Improvements of Extended Drain NMOS (EDNMOS) Device for Electrostatic Discharge (ESD) Protection of High Voltage Operating LDI Chip (고전압용 LDI 칩의 정전기 보호를 위한 EDNMOS 소자의 특성 개선)

  • Yang, Jun-Won;Seo, Yong-Jin
    • Journal of Satellite, Information and Communications
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    • v.7 no.2
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    • pp.18-24
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    • 2012
  • High current behaviors of the extended drain n-type metal-oxide-semiconductor field effects transistor (EDNMOSFET) for electrostatic discharge (ESD) protection of high voltage operating LDI (LCD Driver IC) chip are analyzed. Both the transmission line pulse (TLP) data and the thermal incorporated 2-dimensional simulation analysis demonstrate a characteristic double snapback phenomenon after triggering of biploar junction transistor (BJT) operation. Also, background doping concentration (BDC) is proven to be a critical factor to affect the high current behavior of the EDNMOS devices. The EDNMOS device with low BDC suffers from strong snapback in the high current region, which results in poor ESD protection performance and high latchup risk. However, the strong snapback can be avoided in the EDNMOS device with high BDC. This implies that both the good ESD protection performance and the latchup immunity can be realized in terms of the EDNMOS by properly controlling its BDC.