• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.270-270
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• 2008

We present details of experimental results in the fabrication of high density line patterns, using imprint technique that can provide a simple and comparatively cost-effective manufacturing means. Barrier array structures for display or interconnects for semiconductor applications were the aims of this study. For pattern fabrication, a polymer layer (Ajinomoto GX-13 dielectric film) with a thickness of 38um that can act as either an insulating or a dielectric layer was laminated on a substrate. Fine tracks were then formed using a patterned stamp under isostatic pressure. The line width was ranged between 10 to 60 mm. A self-assembled monolayer (SAM) of fluorinated alkylchlorosilane [$CF_3(CF_2)5(CH_2)2SiCl_3$] as an anti-sticking layer was coated on the surface of the stamp prior to thermal imprint to improve the de-molding characteristic.