• 한국태양에너지학회:학술대회논문집
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• 2012.03a
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• pp.108-112
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• 2012

Crystalline silicon solar cell remains the major player in the photovoltaic marketplace with 90 % of the market, despite the development of a variety of thin film technologies. Silicon's excellent efficiency, stability, material abundance and low toxicity have helped to maintain its position of dominance. However, the cost of silicon photovoltaic remains a major barrier to reducing the cost of silicon photovoltaics. Using the crystalline silicon wafer with thinner thickness is the promising way for cost and material reduction in the solar cell production. However, the thinner thickness of silicon wafer is, the worse bow phenomenon is induced. The bow phenomenon is observed when two or more layers of materials of different temperature expansion coefficiencies are in contact, in this case silicon and aluminum. In this paper, the solar cells were fabricated with different thicknesses of Al layer in order to reduce the bow phenomenon. With lower paste applications, we observed that the bow could be reduced by up to 40% of the largest value with 130 micron thickness of the wafer even though the conversion efficiency decrease of 0.5 % occurred. Since the bowed wafers lead to unacceptable yield losses during the module construction, the reduction of bow is indispensable on thin crystalline silicon solar cell. In this work, we have studied on the counterbalance between the bow and conversion efficiency and also suggest the formation of enough back surface field (BSF) with thinner Al paste application.

• Journal of the Korean Institute of Telematics and Electronics
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• v.18 no.3
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• pp.42-51
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• 1981

Boron was predeposited into p (100) Si wafer at 94$0^{\circ}C$ for 60minutes to make the back surface field. High tempreature diffusion process at 1145$^{\circ}C$ for 3 hours was immediately followed without removing boron glass to obtain high surface concentration Back boron was annealed at 110$0^{\circ}C$ for 40minutes after boron glass was removed. N+ layer was formed by predepositing with POCI3 source at 90$0^{\circ}C$ for 7~15 minutes and annealed at 80$0^{\circ}C$ for 60min1es under dry Of ambient. The triple metal layers were made by evaporating Ti, Pd, Ag in that order onto front and back of diffused wafer to form the front grid and back electrode respectively. Silver was electroplated on front and back to increase the metal thickness form 1~2$\mu$m to 3~4$\mu$m and the metal electrodes are alloyed in N2 /H2 ambient at 55$0^{\circ}C$ and followed by silicon nitride antireflection film deposition process. Under artificial illumination of 100mW/$\textrm{cm}^2$ fabricated N+PP+ cells showed typically the open circuit voltage of 0.59V and short circuit current of 103 mA with fill factor of 0.80 from the whole cell area of 3.36$\textrm{cm}^2$. These numbers can be used to get the actual total area(active area) conversion efficiency of 14.4%(16.2%) which has been improved from the provious N+P cell with 11% total area efficiency by adding P+ back.