• The KIPS Transactions:PartD
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• v.10D no.2
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• pp.309-316
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• 2003

In this paper, we propose a new watermarking method based on spread spectrum and a semi-fingerprinting system architecture that can be built using our robust watermarking method. Especially, we describe a method that extends the application area of watermarking technology to more practical application domains by applying the watermarking technology that has been focused mainly on copyright protection to fingerprinting area. Our proposed watermarking scheme uses the method that inserts more data by using random number shifting method. We improved the reliability of acquired data with 20-bits CRC code and 60-bits inserted information. In addition, we designed the system architecture based on the recommendation of cIDf (content ID forum) in order to apply the system on the semi-fingerprinting area.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.11C
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• pp.1030-1036
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• 2006

In this paper, we present two methods of correcting bit errors in constant amplitude multi-code (CAMC) CDMA, which uses the redundant bits only. The first method is a parity-based bit correction with hard-decision, where the received signals despread into n two-dimensional structure with both horizontal parity and vertical parity. Then, an erroneous bit is corrected for each $4{\times}4$ pattern. The second method is a turbo decoding, which is modified from the decoding of a single parity check product code (SPCPC). Experimental results show that, in the second method, the redundant bits in CAMC can be fully used for the error correction and so they are not really a loss of channel bandwidth. Hence, CAMC provides both a low peak-to-average power ratio and robustness to bit errors.

• Journal of Advanced Navigation Technology
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• v.16 no.5
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• pp.831-838
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• 2012

In the transmission system, the transmission efficiency can be increased by applying the proper character coding method. This paper is to show the character coding rule in computer and information equipment etc to improve the transmission efficiency in datacommunications. The character coding rule showing in this paper was suggested by considering the two view points. First one is FLAG bits in HDLC and PPP protocol on datalink layer in OSI 7 layer. Second one is one of the scrambling method, HDB-3, on physical layer in OSI 7 layer. The former is to prevent the sequence of over 5bits of "1" in the character codes. The latter is to prevent the sequence of over 4bits of "0" in the character codes.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.3
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• pp.430-436
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• 2006

In this paper, a QT_rev protocol is proposed for identifying all the tags within the identification range. The proposed QT_rev protocol revises the QT protocol, which has a memoryless property. In the QT_rev protocol, the tag will send the remaining bits of their identification codes when the query string matches the first bits of their identification codes. After the reader receives all the responses of the tags, it knows which bit is collided. If the collision occurs in the last bit, the reader can identify two tags simultaneously without further query. According to the simulation results, the QT_rev protocol outperforms the QT protocol in terms of the number of queries and the number of response bits.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.4
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• pp.638-644
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• 2006

In this paper, a QT_ss protocol is proposed for identifying all the tags within the identification range. The proposed QT_ss protocol revises the QT protocol, which has a memoryless property. In the QT_ss protocol, the tag will send all the bits of their identification codes when the query string matches the first bits of their identification codes. While the tags are sending their identification codes, if the reader detects a collision bit, it will send a signal to the tags to stop sending. According to the simulation results, the QT_ss protocol outperforms the QT protocol in terms of the number of response bits.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.740-743
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• 2008

RSA crypto-processors equipped with more than 1024 bits of key space handle the entire key stream in units of blocks. The RSA processor which will be the target design in this paper defines the length of the basic word as 128 bits, and uses an 256-bits register as the accumulator. For efficient execution of 128-bit multiplication, $32b^*32b$ multiplier was designed and adopted and the results are stored in 8 separate 128-bit registers according to the stalks flag. In this paper, a fast 32bit nodular multiplier which is required to execute 128-bit MAC (multiplication and accumulation) operation is proposed. The proposed architecture prototype of the multiplier unit was automatically synthesized, and successfully operated at the frequency in the target RSA processor.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.6 no.6
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• pp.1718-1734
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• 2012

The proposed method in this paper is derived from Mielikainen's hiding method. However, there exist some significant differences between two methods. In Mielikainen's method, pixels are partitioned into pairs and a LSB matching function is applied to two pixels for hiding. On the contrary, the proposed method partitions pixels into groups with three pixels in each group. The bits of pixels in each group are linked by using an exclusive OR (XOR) operator in a circular way. If the number of different values between the calculated XOR values and the secret bits is smaller than or equal to 2 in a group, the proposed method can guarantee that at most one pixel is needed to be modified by adding/subtracting its value to/from one, and three secret bits can be embedded to three pixels. Through theoretical analysis, the amount of the embedded secret data in the proposed method is larger than those in other methods under the same amount of pixel modifications. Taking real images in our experiments, the quality of stego-images in the proposed method is higher than those in other methods.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.4
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• pp.1944-1956
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• 2016

The Digital Video Broadcasting-Common Scrambling Algorithm is an ETSI-designated algorithm designed for protecting MPEG-2 signal streams, and it is universally used. Its structure is a typical hybrid symmetric cipher which contains stream part and block part within a symmetric cipher, although the entropy is 64 bits, there haven't any effective cryptanalytic results up to now. This paper studies the security level of CSA against impossible differential cryptanalysis, a 20-round impossible differential for the block cipher part is proposed and a flaw in the cipher structure is revealed. When we attack the block cipher part alone, to recover 16 bits of the initial key, the data complexity of the attack is O(2^44.5), computational complexity is O(2^22.7) and memory complexity is O(2^10.5) when we attack CSA-BC reduced to 21 rounds. According to the structure flaw, an attack on CSA with block cipher part reduced to 21 rounds is proposed, the computational complexity is O(2^21.7), data complexity is O(2^43.5) and memory complexity is O(2^10.5), we can recover 8 bits of the key accordingly. Taking both the block cipher part and stream cipher part of CSA into consideration, it is currently the best result on CSA which is accessible as far as we know.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.9
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• pp.392-397
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• 2003

Reflection type phase shifter with Lange coupler is widely used as a circuit topology to obtain phase shift in broadband operation. The phase shift of 33.75$^{\circ}$ at this type is achieved by simultaneously turning on both 11.25$^{\circ}$ and 22.5$^{\circ}$ . In order to improve the phase accuracy of 33.75$^{\circ}$, this paper proposes the additional circuit which is composed of a GaAs PIN diode and a reactive load. By utilizing MMIC technology. Over the 2-6 GHz band, the measured result of phase difference between the previous circuit and the proposed circuit shows average 4.7$^{\circ}$ on the basis of 33.75$^{\circ}$. Insertion loss and return loss are invariant in comparison with the previous circuit.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.9 no.1
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• pp.1-10
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• 1984

The time division multiplexing PCM encoder which is constructed for an airborne telemetering system is investigated. Selected by program switch, the PCM encoder has 0~64 words/framd($\pm$5V full scale) of allowable analog input channels, 0~30bits(5V$\pm$1V or 0V$\pm$1V dc) of discrete channels, 70 and 140K bits/sec of bit rate and 8~12bits/word of resolution. And filtered output PCM code is NRZ-L and Bi-S through the 5 pole Bessel LPF(f=100kHz), and the maximum accuracy of PCM encoder is $\pm$0.2% of its full scale.