• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.8 s.99
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• pp.777-782
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• 2005

In this paper, adaptive bias circuit and PBG structure have been employed to suppress IMD(Inter-Modulation Distortion) and improve PAE(Power Added Efficiency) of the Doherty amplifier. Gate bias voltage has been controlled with the envelope of the input RF signal and PBG structure has been employed on the output port of Doherty amplifier. The proposed power amplifier using adaptive bias circuit and PBG has been improved the $IMD_3$ by 7.5 dBc, and the average PAR by $12\%$, respectively.

• Journal of Biosystems Engineering
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• v.23 no.1
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• pp.1-12
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• 1998

This study was intended to investigate experimentally the effect of inflation pressure on tractive performance of bias-ply tires for agricultural tractors. Traction tests were conducted at the three velocities of 3, 4, and 5.5km/h under few different surface conditions using a 13.6-28 6PR bias-ply tire as driving wheel of the test tractor. When the inflation pressure was reduced from 250kPa to 40kPa by a decrement of either 30 or 50kPa depending upon the test surface conditions, some of the test results showed that the tractive coefficient and efficiency were increased maximally by 40% and 17％, respectively, at 20% slippage. However, it was failed to derive any consistent rules depicting the effect of inflation pressure of bias ply tires on the tractive performance of tractors.

• Journal of information and communication convergence engineering
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• v.8 no.1
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• pp.107-111
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• 2010

This paper has presented the dependence of the threshold voltage on back gate bias and drain voltage for FinFET. The FinFET has three gates such as the front gate, side and back gate. Threshold voltage is defined as the front gate bias when drain current is 1 micro ampere as the onset of the turn-on condition. In this paper threshold voltage is investigated into the analytical potential model derived from three dimensional Poisson's equation with the variation of the back gate bias and drain voltage. The threshold voltage of a transistor is one of the key parameters in the design of CMOS circuits. The threshold voltage, which described the degree of short channel effects, has been extensively investigated. As known from the down scaling rules, the threshold voltage has been presented in the case that drain voltage is the 1.0V above, which is set as the maximum supply voltage, and the drain induced barrier lowing(DIBL), drain bias dependent threshold voltage, is obtained using this model.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.376-377
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• 2013

반도체산업이 발전함에 따라 패턴이 점점 더 복잡해 지고 있다. 이에 따라 웨이퍼 위에 올려지는 layer도 개수도 많아지고 점점 더 두꺼워진다. 예전에는 수백 nm였지만 최근에는 um단위까지 두꺼워지고 있다. 하지만 mask 역할을 하는 ACL과 substrate (SiO2)의 selectivity는 일정하기 때문에 mask 역할을 하는ACL layer 역시 두꺼워지는 것이 불가피하다. 이로인해 예전에는 없었던 문제들이 발생하기 시작한다. Mask 역할을 하는 ACL layer가 얇고 패턴 크기가 클 때에는 아무런 문제도 없었지만 ACL layer도 두꺼워 지고 패턴 크기도 수십 nm로 작아졌기 때문에 ACL 역시 식각 공정을 할 때 어려움이 생기기 시작한다. 이를 해결하기 위한 하나의 방법으로 자화된 ICP 챔버 substrate에 Dual bias frequency 인가하여 식각해 보고 이와같이 하였을 때 식각특성을 분석해 보았다. 자화된 ICP 챔버에서 substrate에 dual bias frequency를 인가함으로써 ion energy와 ion flux에 변화가 생기게 되고 이로 인해 다른 식각 특성이 나타나게 되었다. Dual bias frequency의 비율을 변화시켜 보고 변화에 따른 식각 특성을 분석해 보았다. 이와 같은 과정을 통하여 높은 주파수와 낮은 주파수의 각각의 변화에 따른 식각특성의 변화에 대한 이해를 할 수 있었다.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.5
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• pp.93-99
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• 1998

The chirping characteristics of InGaAsP electroabsorption modulatiors have been analyzed. The effective .alpha. parameters for large signal modulation were estimated by comparing the pulse shape after fiber transmission with constant chirping assumption.We investigated the structure and the operating condition of the modulator to improve the chirping characteristics. The .alpha. parameters were calculated as the function of wavelength detuning and the bias voltage. To minimize the chirping performance, high bias voltage and a small wavelength detuning and the bias voltage. To minimize the chirping performance, high bias voltage and a small wavelength detuning were preferred. An negative .alpha. value is achieved at the wavelength detuning below 30meV with a proper bias voltage so that pulse compression effect was expected.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.445-448
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• 2006

Bias stress effect in pentacene organic thin-flim transistors with cross-linked PVA gate dielectric is analyzed. For negative gate bias stress, positive threshold voltage shift is observed. The injected charges from the gate electrode to the defect states of gate dielectric are regarded as the main origin of $V_T$ shift. The reduced bias stress effect using $SiO_2$ blocking layer confirms the assumed mechanism. It is also demonstrated that the inverter with $SiO_2$ blocking layer shows the negligible hysteresis owing to the reduced bias stress effect.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.258-258
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• 2010

In this work, back bias effects in the program of the silicon-oxide-nitride-oxide-silicon (SONOS) cell using two-step pulse sequence, are investigated. Two-step pulse sequence is composed of the forward biases for collecting the electrons at the substrate terminal and back bias for injecting the hot electrons into the nitride layer. With an aid of the back bias for electron injection, we obtain a program time as short as 600 ns and an ultra low-voltage operation with a substrate voltage of -3 V.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.127.6-127
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• 2001

In this paper, we deal with two bias compensation algorithms of acceleration sensor for measuring the galloping on power transmission line. Firstly, the block diagram of galloping measurement system is given and a galloping model is presented. Secondly, two compensation algorithms, a simple compensation and a period compensation, are proposed. A simple compensation algorithm use the drafts of velocity and distance at fixed periods, so it is useful for constant bias case. Next, a period compensation algorithm can compensate a periodic bias. This algorithm use the previous measured data and compensated data for constant period, where the period is obtained by FFT method. Lastly, the effectiveness of proposed algorithms is verified by comparing between two algorithms in simulation, and its characteristics and the bias error bound are shown, respectively.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.963-966
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• 1999

This Paper describes the design of high speed and low power comparator based on the feed forward bias control. Major building blocks of this comparator are composed of input offset canceling circuit and feed forward bias control circuit. The usual offset canceling circuit cancels the offset voltages by storing them in capacitors using MOS switches, The comparator of this paper employs the bias control circuit which generates bias signal from the input signal. The bias signal is applied to the capacitors and keeps the transfer of chares in the capacitors in the minimal amount, therefore making the comparator operate in stable condition and reduce decision time. The comparator in this form has very samll area and power dissipation. Maximum sampling rate is 200 Ms/sec. The comparator is designed in 0.65${\mu}{\textrm}{m}$ technology and the offset is less than 0.5㎷.

• Journal of Magnetics
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• v.14 no.4
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• pp.168-171
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• 2009

We propose a new type of spin torque nano-oscillator structure with an exchange- biased free rotating layer. The proposed spin torque nano-oscillator consists of a fixed layer and a free rotating layer with an additional anti-ferromagnetic layer, which leads to an exchange bias in the free rotating layer. The spin dynamics of the exchange-biased free rotating layer can be described as an additional exchange field because the exchange bias manifests itself by the existance of a finite exchange bias field. The exchange bias field plays a similar role to that of a finite external field. Hence, microwave generation can be achieved without an external field in the proposed structure.