• 전자공학회논문지A
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• 제32A권8호
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• pp.119-125
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• 1995

Strained multiple quantum well(SMQW) PBH-DFB-LDs emitting at 1.55$\mu$m wavelength has been fabricated using OMVPE and LPE crystal growth tecnique. Using the SMQW active layer, a linewidty enhancement factor of 2.65 was obtained at lasing wavelength and consequnently, packaged 42 modules showed a very low average chirp of 0.44nm at 2.5Gbps NRZ direct modulation. The 77 devices showed average threshold current of 8.72mA and average slope efficiency of 0.181 mW/mA, and single longitudinal mode operation with SMSR larger than 30dB up to 5mW. Among the 77 devices, standard deviation of lasing wavelength of 3.57nm was obtained owing to a good crystal growth uniformity.

• 전기학회논문지
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• 제65권4호
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• pp.586-592
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• 2016

The current control of Continuous Conduction Mode(CCM) can be implemented by several methods: peak current control; average current control; and hysteresis control. Among these methods, the hysteresis current control is popularly applied in various converter applications because of its simplicity of implementation, fast current control response and inherent peak current limiting capability. However, a current controller with conventional hysteresis band which multiplies the current reference has the disadvantage that the modulation frequency varies in one cycle of the input voltage and, as a result, generates high switching frequency in the low input voltage section. Also it is complicated to design the input filter due to varying switching frequency. This paper proposed an optimum hysteresis-band current control method where the band is generated by using both multiplication method and sum method to maintain the modulation frequency to be nearly constant. This approach can solve the high switching frequency in the low input voltage section, and achieve easy design of input filter. The performance of the proposed converter is verified with the simulation and the experimental works.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2005년도 전력전자학술대회 논문집
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• pp.442-444
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• 2005

본 논문에서는 평균전류모드제어를 이용하는 컨버터의 연속시간 소신호 모델을 구한다. 평균전류모드제어에 일반적으로 사용되는 보상기를 적용한 컨버터의 해석을 위해 샘플러를 전류루프에 포함시켜 해석한다. 기존 모델에서는 정확히 해석하기 어려웠던 전류루프 이득의 고주파 영역 해석이 제안한 모델을 이용함으로써 쉽게 해결할 수 있으며, 시스템의 안정성을 결정하는 고주파 영역에서의 주파수 응답 특성을 제안한 모델이 우수한 성능으로 예측 가능함을 보인다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.655-658
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• 2005

Due to reduced device sizes and threshold voltages, leakage current becomes an important issue in CMOS design. In a CMOS combinational logic circuit, the leakage current in the standby state depends on the state of the inputs and thus can be minimized by applying an optimal input when the circuit is idling. In this paper, we present a New Input Vector Control algorithm, called Leakage Minimization by Input vector Control (LMIC) for minimal leakage power. This algorithm finds the minimal leakage vector and reduces leakage current up to 22.% on the average, for TSMC 0.18um process parameters. Minimal leakage vectors are very useful in reducing leakage currents in standby mode of operation.

• 전기학회논문지
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• 제60권2호
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• pp.320-324
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• 2011

A digital technique is adopted to calibrate the current mismatch of the charge pump (CP) in phase-locked loops. A 2 GHz charge pump PLL (CPPLL) is used to justify the proposed calibration technique. The proposed digital calibration technique is implemented simply using a counter. The proposed calibration technique reduces the calibration time by up to a maximum of 50% compared other with techniques. Also by using a dual-mode CP, good current matching characteristics can be achieved to compensate $0.5{\mu}A$ current mismatch in CP. It was designed in a standard $0.13{\mu}m$ CMOS technology. The maximum calibration time is $33.6{\mu}s$ and the average power is 18.38mW with 1.5V power supply and effective area is $0.1804mm^2$.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 추계학술대회 논문집 학회본부
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• pp.373-377
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• 1996

Recently, active power factor control for AC/DC converter has been required to replace for a conventional diode rectifier. A voltage type AC/DC converter is widely used to obtain higher regulated DC voltage than input voltage with a unity power factor and a sinusoidal line current. This paper describes several active power factor control method for AC/DC converter. The analysis of several active power factor control is given. The simulations for hysteresis control, peak current control. constant frequency control and average current mode control are represented and compared.

• Journal of Electrical Engineering and Technology
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• 제1권1호
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• pp.110-113
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• 2006

A high rate deposition sputtering process of magnesium oxide thin film in oxide mode has been developed using a 20 kW unipolar pulsed power supply. The power supply was operated at a maximum constant voltage of 500 V and a constant current of 40 A. The pulse repetition rate and the duty were changed in the ranges of $10\sim50$ kHz and $10\sim60%$, respectively. The deposition rate increased with rising incident power to the target. Maximum incident power to the magnesium target was obtained by the control of frequency, duty and current. The deposition rate of a moving state was 9 nm m/min at the average power of 1.5 kW. This result shows higher deposition rate than any other previous work involving reactive sputtering in oxide mode. The thickness uniformities over the entire substrate area of $982mm{\times}563mm$ were observed at the processing pressure of $2.8\sim9.5$ mTorr. The thickness distribution was improved at lower pressure. This technique is proposed for application to a high through-put sputtering system for plasma display panels.

• 한국ITS학회 논문지
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• 제10권4호
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• pp.93-99
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• 2011

본 논문에서는 자동차 환경내 안정된 VoIP 통신시스템을 위한 새로운 네트워크 지터 추정 알고리즘을 제안한다. 제안된 알고리즘은 패킷간의 도착시간과 생성시간 차이를 계산하여 패킷이 겪은 현재 네트워크 환경을 추정하고, 추정된 네트워크 환경을 통해 네트워크 지터 추정에 사용될 네트워크 지터 분산 가중치를 조정한 후에, 조정된 지터 분산 가중치와 네트워크 지터의 평균과 분산을 계산하여 다음에 도착할 패킷의 네트워크 지터를 추정한다. 본 논문에서는 WiFi를 이용한 VoIP에서 수신단에 도착한 패킷에 대해 Delay와 Loss를 측정함으로써 제안된 방식의 우수성을 입증하였다.

• 전력전자학회논문지
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• 제26권1호
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• pp.53-58
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• 2021

Operation of the interleaved Boost PFC converter in Critical Conduction Mode (CrM) shows the advantages of high efficiency and good EMI characteristics owing to the valley switching of FET. However, when it is designed for a highly pulsating load, operation at a relatively high frequency is inevitable at non-pulsating typical load condition, resulting in efficiency degradation. Moreover, the physical size of the inductor becomes problematic because of the nature of the CrM operation, where the inductor peak current is about two times the inductor average current, thereby requiring high DC-bias characteristics, which is worse when the output power is high. In this study, a new parallel driving method of two sets of interleaved boost PFC converters for highly pulsating high-power application is proposed. The proposed method does not require any additional load-sharing controller, resulting in high efficiency and smaller inductor size.

• Journal of the Optical Society of Korea
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• 제14권2호
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• pp.137-141
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• 2010

We report, for the first time to our knowledge, observation of polarization bistability from 1.55-${\mu}m$ wavelength single-mode VCSELs of a conventional cylinder-shape under control of their driving current, and demonstration of all-optical flip-flop (AOFF) operations based on the bistability with optical set and reset pulse injection at a 50 MHz switching frequency. The injection pulse energy was less than 14 fJ. The average on-off contrast ratio of the flip-flopped signals was about 7 dB. These properties of the VCSELs will be potentially useful for future high-speed all-optical signal processing applications.