• Title/Summary/Keyword: Automatic gain control (AGC)

Search Result 65, Processing Time 0.022 seconds

A Dual-Channel CMOS Transimpedance Amplifier Array with Automatic Gain Control for Unmanned Vehicle LADARs (무인차량 라이다용 CMOS 듀얼채널 자동 이득조절 트랜스임피던스 증폭기 어레이)

  • Hong, Chaerin;Park, Sung Min
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.65 no.5
    • /
    • pp.831-835
    • /
    • 2016
  • In this paper, a dual-channel feed-forward transimpedance(TIA) array is realized in a standard $0.18-{\mu}m$ CMOS technology which exploits automatic gain control function to provide 40-dB input dynamic range for either detecting targets nearby or sensing imminent danger situations. Compared to the previously reported conventional feed-forward TIA, the proposed automatic-gain-control feed-forward TIA(AFF-TIA) extends the input dynamic range 25 dB wider by employing a 4-level automatic gain control circuit. Measured results demonstrate the linearly varying transimpedance gain of 47 to $72dB{\Omega}$, input dynamic range of 1:100, the bandwidth of $${\geq_-}670MHz$$, the equivalent input referred noise current spectral density of 6.9 pA/${\surd}$HZ, the maximum sensitivity of -26.8 dBm for $10^{-12}BER$, and the power consumption of 27.6 mW from a single 1.8-V supply. The dual-channel chip occupies the area of $1.0{\times}0.73mm^2$ including I/O pads.

RF performance Analysis for Galileo Receiver Design (갈릴레오 수신기 설계를 위한 RF 성능 분석에 관한 연구)

  • Chang, Sang-Hyun;Lee, Il-Kyoo;Park, Dong-Pil;Lee, Sang-Wook
    • Journal of Satellite, Information and Communications
    • /
    • v.5 no.1
    • /
    • pp.58-62
    • /
    • 2010
  • This paper presents the effects of RF performance parameters on the Galileo receiver design via simulation after reviewing the requirements of the Galileo receiver structure. At first, we considered the general requirements, structure and characteristics of the Galileo system. Then we designed the Galileo receiver focused on performance requirement of 16 dB C/N which is equal to 15 % Error Vector Magnitude(EVM) by using Advanced Design System(ADS) simulation program. In order to verify the function of Automatic Gain Control(AGC)), we measured the IF output power level by changing the input power level at the front - end of the receiver. We analyzed the performance degradation due to phase noise variations of Local Oscillator(LO) in the Galileo receiver through EVM when the minimum sensitivity level of -127 dBm is applied at the receiver. We also analyzed the performance degradation according to variable Analog-to-Digital Converter(ADC) bits within the Dynamic range, -92 ~ -139 dBm, which has been defined by gain range (-2.5 ~ +42.5 dB) in the AGC operation. The results clearly show that the performance of the Galileo receiver can be improved by increasing ADC bits and reducing Phase Noise of LO.

Design of an 8-bit 230MSPS Analog Flat Panel Interface for TFT-LCD Driver (TFT-LCD 드라이버를 위한 8-bit 230MSPS Analog Flat Panel InterFACE의 설계)

  • Yun, Seong-Uk;Im, Hyeon-Sik;Song, Min-Gyu
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.39 no.2
    • /
    • pp.1-6
    • /
    • 2002
  • In this paper, an Analog Flat Panel interface(AFPI) which supports for UXGa(Ultar extended Graphics Array)-Compatible TFT LCD Driver is designed. The Proposed AFPI is composed of 8-b ADC, Automatic Gain Control(AGC), Low-Jitter PLL. In order to obtain a high speed and low power consumption, an efficient architecture of 8-bit ADC is proposed, whose FR(Folding Rate) is 8, NFB(Number of Folding Block) is 2, and IR (Interpolating Rate) is 16. We can get high SNDR by adopting distributed track and hold circuits. Also a programmable AGC which is possible to control gain and clamp, and a low-jitter PLL are proposed. The chip has been fabricated with 0.25${\mu}{\textrm}{m}$ 1-poly S-metal n-well CMOS technology. The effective chip area is 3.6mm $\times$ 3.2mm and it dissipates about 602㎽ at 2.5V power supply. The INL and DNL are within $\pm$ 1LSB. The measured SNDR is about 43㏈, when the input frequency is 10MHz at 200MHz clock frequency.

An Improvement of Performance in a Satellite Antenna Tracking Control System for Mobile DAB Reception (DAB수신을 위한 이동체용 위성 안테나 트랙킹 시스템의 성능 개선)

  • Jeong Joong-Sung
    • Journal of Advanced Marine Engineering and Technology
    • /
    • v.28 no.7
    • /
    • pp.1178-1184
    • /
    • 2004
  • This paper presents the development of a satellite antenna tracking control system using a plane antenna for mobile DAB(Digital Audio Broadcasting) reception. To track more rapidly in the antenna of this system, this simple tracking system only tracks a direction of azimuth using pendulum in the direction of elevation. This system should track using the AGC(Automatic Gain Control) of the signal level which can receive DAB in spite of the changing of point and movement of the mobile. The directional gyro sensor is attached to solve the delay time in the Proposed tracking algorithm. The effectiveness of both the stabilization and tracking algorithm is demonstrated through experiment measuring AGC signal level. The implemented satellite antenna tracking control system is shown to be excellent for mobile DAB reception.

A Study on the Position Detection Device for a Hybrid Type Linear Pulse Motor (HB형 LPM의 위치검출장치에 관한 기초연구)

  • 신춘식;김남호;노창주
    • Journal of Advanced Marine Engineering and Technology
    • /
    • v.20 no.1
    • /
    • pp.31-36
    • /
    • 1996
  • In recent years, as the electonic industry has become more advanced, the LPM(Linear Pulse Motor) has appeared in a wide range of applications because of easier control, operation by open-loop control, high positioning accuracy, and retrieval of position or velocity data by the input pulses. In this study, we deal with the development of a position detection device attached to a hybrid LPM in our laboratory. Precise position detection signals could be sensed by the synchronous rectifier method from the LPM stator scale. In addition, we can keep the amplitude constant by using an AGC(Automatic Gain Control) circuit. Experimental results show that the position data is good enough to perform the LPM position control.

  • PDF

A Study on Selection Criterions for Selection Diversity in WAVE Systems (WAVE 시스템에서 선택 다이버시티를 위한 선택 기준에 대한 연구)

  • Hong, Dae-Ki
    • Journal of the Semiconductor & Display Technology
    • /
    • v.14 no.2
    • /
    • pp.9-16
    • /
    • 2015
  • In this paper, selection criterions on selection diversity are researched. The diversity is applied to the multiple antenna system based on wireless access in vehicular environment (WAVE) standard for rapid varying channel. Least squares (LS) based decision feedback equalizer (DFE) are used for channel equalization. Received signal is regenerated by means of the decision feedback path. In the selection diversity, the regenerated signal as well as the received signal is selected according to selection criterion. The decision feedback algorithm can follow the fast speed of WAVE fading channel. To control the tracking speed of the time-varying channel, simple low pass filter is used. Finally, the estimated channel value recovers the distorted payloads. Signal power before automatic gain control (AGC) in analog stage can be used as a selection criterion. In the digital stage, signal power after AGC, noise power after AGC, signal to noise ratio after AGC and cross-correlation method can be used as selection criterions. According to the simulation results, the performance of the selection diversity is improved in comparison with that of the combining diversity for the WAVE fading channel.

A Real-Time Histogram Equalization System with Automatic Gain Control Using FPGA

  • Cho, Jung-Uk;Jin, Seung-Hun;Kwon, Key-Ho;Jeon, Jae-Wook
    • KSII Transactions on Internet and Information Systems (TIIS)
    • /
    • v.4 no.4
    • /
    • pp.633-654
    • /
    • 2010
  • High quality camera images, with good contrast and intensity, are needed to obtain the desired information. Images need to be enhanced when they are dark or bright. The histogram equalization technique, which flattens the density distribution of an image, has been widely used to enhance image contrast due to its effectiveness and simplicity. This technique, however, cannot be used to enhance images that are either too dark or too bright. In addition, it is difficult to perform histogram equalization in real-time using a general-purpose computer. This paper proposes a histogram equalization technique with AGC (Automatic Gain Control) to extend the image enhancement range. It is designed using VHDL (VHSIC Hardware Description Language) to enhance images in real-time. The system is implemented with an FPGA (Field Programmable Gate Array). An image processing system with this FPGA is implemented. The performance of this image processing system is measured.

A Fully Digital Automatic Gain Control System with Wide Dynamic Range Power Detectors for DVB-S2 Application (넓은 동적 영역의 파워 검출기를 이용한 DVB-S2용 디지털 자동 이득 제어 시스템)

  • Pu, Young-Gun;Park, Joon-Sung;Hur, Jeong;Lee, Kang-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.46 no.9
    • /
    • pp.58-67
    • /
    • 2009
  • This paper presents a fully digital gain control system with a new high bandwidth and wide dynamic range power detector for DVB-S2 application. Because the peak-to-average power ratio (PAPR) of DVB-S2 system is so high and the settling time requirement is so stringent, the conventional closed-loop analog gain control scheme cannot be used. The digital gain control is necessary for the robust gain control and the direct digital interface with the baseband modem. Also, it has several advantages over the analog gain control in terms of the settling time and insensitivity to the process, voltage and temperature variation. In order to have a wide gain range with fine step resolution, a new AGC system is proposed. The system is composed of high-bandwidth digital VGAs, wide dynamic range power detectors with RMS detector, low power SAR type ADC, and a digital gain controller. To reduce the power consumption and chip area, only one SAR type ADC is used, and its input is time-interleaved based on four power detectors. Simulation and measurement results show that the new AGC system converges with gain error less than 0.25 dB to the desired level within $10{\mu}s$. It is implemented in a $0.18{\mu}m$ CMOS process. The measurement results of the proposed IF AGC system exhibit 80-dB gain range with 0.25-dB resolution, 8 nV/$\sqrt{Hz}$ input referred noise, and 5-dBm $IIP_3$ at 60-mW power consumption. The power detector shows the 35dB dynamic range for 100 MHz input.

A Novel Digital Automatic Gain Control for a WCDMA Receiver

  • Kim, Kyusheob;Sungbin Im;Kim, Chonghoon
    • Proceedings of the IEEK Conference
    • /
    • 2002.07b
    • /
    • pp.1358-1361
    • /
    • 2002
  • In this paper, we propose a new architecture of digital automatic gain control (AGC) for a wideband code division multiple access (WCDMA) receiver. The feature of the proposed architecture is simplicity, in that it does not utilize complicated mathematical functions such as log and its inverse. When the proposed algorithm is implemented using a field programmable gate array (FPGA) device, the number of slices used to implement is 130 over the total of 5120 slices (less than 3%) with 61.44 ㎒ clock. This algorithm has been successfully applied to commercial WCDMA base stations.

  • PDF

Design and Implementation of a Up Down Converter for Asynchronous IMT-2000 Base Station (비동기식 IMT-2000 기지국용 Up Down Converter 설계 및 제작)

  • 손병일;전석찬;방성일
    • Proceedings of the IEEK Conference
    • /
    • 2000.06a
    • /
    • pp.61-64
    • /
    • 2000
  • In this paper, we design up-down converter for asynchronous IMT-2000 base station using W-CDMA(Wideband Code Division Multiple Access) technology. This up-down converter(UDC) has AGC (Automatic Gain Control), TPTL(Transmitting Power Tracing Loop), RSSI(Received Signal Strength Indicator) function. And for the cell control of BS(Base Station), breathing, blossoming, wilting function also available. This UDC has diversity structure for better performance.

  • PDF