• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.2
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• pp.451-454
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• 2011

In this paper, a wideband clock generator using novel Automatic frequency calibration(AFC) scheme is proposed. Wideband clock generator using AFC has the advantage of small VCO gain and wide frequency band. The conventional AFC compares whether the feedback frequency is faster or slower then the reference frequency. However, the proposed AFC can detect frequency difference between reference frequency with feedback frequency. So it can be reduced an operation time than conventional methods AFC. Conventional AFC goes to the initial code if the frequency step changed. This AFC, on the other hand, can a prior state code so it can approach a fast operation. In simulation results, the proposed clock generator is designed for DisplayPort using the CMOS ring-VCO. The VCO tuning range is 350MHz, and a VCO frequency is 270MHz. The lock time of clock generator is less then 3us at input reference frequency, 67.5MHz. The phase noise is -109dBC/Hz at 1MHz offset from the center frequency. and power consumption is 10.1mW at 1.8V supply and layout area is $0.384mm^2$.

• Journal of Korean Institute of Industrial Engineers
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• v.22 no.2
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• pp.209-229
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• 1996

Scheduling problems which determine the sequence of jobs are one of the Important issues to many industries. This paper deals with a single-machine job sequencing problem which has complex constraints and an objective function. To solve the problem, an expressive constraint description language and an automatic code generator are developed for our scheduling system. The user just needs to describe the scheduling problem using the constraint description language that allows to express both quantitative and qualitative constraints as well as an objective function in real world semantics. Then, a complete scheduling program based on constraint satisfaction technique is automatically generated through the code generator. Advantage of this approach is that models of the scheduling problems are easily developed and maintained because models ore formulated by using the language which reflects real world semantics.

• The KIPS Transactions:PartA
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• v.14A no.1 s.105
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• pp.31-38
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• 2007

Code Optimization is converting to a code that is equivalent to given program but more efficient, and this process is processed in Code Optimizer. This paper designed and processed Code Optimizer Generator that automatically generates Code Optimizer. In other words Code Optimizer is automatically generated for DFA Pattern Matching which finds the optimal code for the incoming pattern description. DFA Pattern Matching removes redundancy comparisons that occur when patterns are sought for through normalization process and improves simplification and structure of pattern shapes for low cost. Automatic generation of Code Optimization for DFA Pattern Matching eliminates extra effort to generate Code Optimizer every time the code undergoes various transformations, and enables formalism of Code Optimization. Also, the advantage of making DFA for optimization is that it is faster and saves cost of Code Optimizer Generator.

• Journal of information and communication convergence engineering
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• v.8 no.5
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• pp.493-497
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• 2010

This paper address the problem of tracking multiple objects encountered in many situation in developing condensation algorithms. The difficulty lies on the fact that the implementation of condensation algorithm is not easy for the general users. We propose an automatic code generation program for condensation algorithm using MATLAB tool. It will help for general user who is not familiar with condensation algorithm to apply easily for real system. The merit of this program is that a general industrial engineer can easily simulate the designed system and confirm the its performance on the fly.

• The KIPS Transactions:PartA
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• v.19A no.2
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• pp.101-112
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• 2012

In recently years, distributed real-time software has performed important roles in various areas. Real-time applications should be performed with satisfying strict constraints on response time. Usually real-time applications are developed on the real-time supporting middleware such as TMO(Time-triggered, Message-triggered Object), CORBA/RT, and RTAI. However, it is not easy to develop applications using them since these real-time middleware are unfamiliar to programmers. In this paper, we propose an automatic code generator for real-time application based on TMO in order to reduce development costs. For increasing or reflecting the characteristics of TMO into the design model, SpM and SvM methods are added into the class diagram, which have time constraints as their properties. And behaviors of them are represented as separated regions on state machine diagram in different abstract level. These diagrams are inputted into TMO-based code automatic generator, which generates details of the TMO class. Our approach has advantages for decreasing effort and time for making real time software by automatically generating TMO codes without detailed knowledge of TMO.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.3
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• pp.96-105
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• 1992

The use of fixed-point digital signal processors, such as the TMS 320C25, requires scaling of data at each arithmetic step to prevent overflows while keeping the accuracy. A software which automatizes this process is developed for TMS 320C25. The programmers use a model of a hypothetical floating-point digital signal processor and a floating-point format for data representation. However, the program and data are automatically translated to a fixed-point version by this software. Thus, the execution speed is not sacrificed. A fixed-point variable has a unique binary-point location, which is dependent on the range of the variable. The range is estimated from the floating-point simulation. The number of shifts needed for arithmetic or data transfer step is determined by the binary-points of the variables associated with the operation. A fixed-point code generator is also developed by using the proposed automatic scaling software. This code generator produces floating-point assembly programs from the specifiations of FIR, IIR, and adaptive transversal filters, then floating-point programs are transformed to fixed-point versions by the automatic scaling software.

• Journal of Convergence Society for SMB
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• v.2 no.1
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• pp.33-40
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• 2012

Recently, embedded environment suffers a huge change, by growth of hardware and turning to be software-controlled. This has improved embedded software complexity. It also brought us the limit of the old development way to resolve the problem. Model-driven development is one solution to solve the limit common software development by previous way, and it became a one uses for embedded environment also. In this paper, we propose model based development approach for embedded software, witch consists of diagram editor and automatic code generator. The diagram editors are implemented by GMF, which include additional functions to solve memory restrictions and concurrent execution problems without OS environment to a automatic code generator. In order to verify the generated code, it will be tested in main control model of UAV by replacing existing module with generated one.

• Journal of the Korea Society of Computer and Information
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• v.13 no.3
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• pp.45-55
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• 2008

Due to the increasing complexity of embedded system design, automatic code generation of embedded software and hardware-software co-design methodologies are gaining great interest from industries and academia. Such an automatic design methodologies are always demanding a formal system specification languages for defining designer's idea clearly and precisely. In this paper, we propose automatic embedded C code generation from SDL (Specification and Description Language, ITU-T recommended the SDL as a standard system description language) with considering a real-time uC/OS-II operating system. Our automatic embedded C code generator is expected to provide a fast specification, verification and performance evaluation platform for embedded software designs.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.11
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• pp.115-121
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• 2004

GenJTAG implemented in this paper is an automatic web-based boundary scan circuit generator. GenJTAG supports all the public instructions for the boundary scan technique, and also private instructions for other DFT techniques to be applied. Users can easily edit the generated boundary scan circuit code because it is described in behavioral level with the Verilog-HDL. GenJTAG has another advantage that any one can generate the boundary scan circuit by simply accessing to the web site.

• Journal of the Korean Society of Marine Environment & Safety
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• v.23 no.6
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• pp.754-758
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• 2017

In this paper, we designed and manufactured an automatic control system to minimize or avoid damage by automatically controlling ship engines in case of fog to allow for safer operation. This automatic power control system uses ATmega128 and an RPM detection circuit to measure RPM changes by artificially generating fog in the fog generator. For this purpose, we have created a complete schematic and applied our source code to an ATmega128 for PWM control using a Hall sensor motor. In future, an experiment and safety evaluation using this automatic power control system with an actual ship will be prepared.