• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.532-532
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• 2008

본 연구에서는 Embedded 기판용 폴리머 후막저항의 허용편차 개선을 위하여 새로운 후막 패터닝 기술을 도입하는 연구를 실시하였다. 기존의 Embedded 기판용 폴리머 후막저항은 스크린 인쇄에 의하여 형성됨에 따라 패턴의 정밀성이 떨어지고 기판 상 위치별 두께편차에 의하여 저항값의 허용편차(tolerance)가 ${\pm}$20~30% 정도로 큰 단점을 가지고 있다. 따라서 경화 후 laser trimming 공정을 필수적으로 동반하게 된다. 이를 개선하기 위하여 본 연구에서는 알칼리 수용액에 현상이 가능한 감광성 레진을 이용하여 폴리머 후막저항 페이스트를 제작하는 것과 함께 기판 전면에 균일한 두께로 인쇄하는 roll coating 방법을 도입하는 실험을 수행하였다. 알칼리 현상형의 감광성 레진 시스템은 노광 및 현상에 의해 정밀한 패턴을 구현할 수 있는 장점을 가지고 있으며, 본 연구에는 A사의 일액형 레진과 T사의 이액형 레진을 사용하였다. 여기에 전도성 필러로서 카본블랙을 첨가하였는데, 그 첨가량의 조절에 따른 후막저항의 시트저항값 변화와 현상 특성을 관찰하였다. 테스트 보드는 FR-4 기판 상에 전극 형상의 동박을 패터닝 후 Ni/Au 도금까지 실시하여 제작하였고, 이 테스트 보드 상에 별도로 제작된 저항 페이스트를 도포한 후 저항체 패턴이 입혀져 있는 Cr 마스크를 이용하여 노광하였다. 이후 현상 공정을 통하여 저항체를 패터닝하고, 이를 $200^{\circ}C$에서 1시간 열경화하는 것으로 후막 저항 테스트쿠폰을 제작하였다. 실험결과 roll coating에 의해 도포된 후막저항체들은 균일한 두께 범위를 나타내었고, 이에 따라 최종 경화 후 허용편차도 통상 ${\pm}$5~10% 이내로 제어될 수 있었다.

• Korean Journal of Optics and Photonics
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• v.18 no.2
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• pp.149-154
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• 2007

Bragg reflecting waveguide devices have been fabricated on a flexible polymer substrate utilizing a post lift-off process which could Provide excellent uniformity of grating Patterns on Plastic film. The 510 m Period Bragg grating pattern is made by two methods. In the first sample the grating is fabricated by exposing the laser interference pattern on a photoresist, and then it is inscribed by $O_2$ plasma etching. The grating pattern of the second sample is formed by a PDMS soft mold imprinting process. The selective adhesion property of SU-8 material for Au and Si surfaces is utilized to prepare a 100-mm thick plastic substrate. Single mode waveguide is fabricated on the plastic substrate using polymer materials with refractive indices of 1.540 and 1.430 for the core and the cladding layers, respectively. The Bragg grating on Plastic substrate does not show any degradation in its spectral response compared to the reference sample made on a silicon wafer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.05a
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• pp.84-87
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• 2005

본 논문에서는 p-type 고분자 물질인 P3HT (Poly-3-hexylthiophene)를 잉크젯 프린팅 방식으로 활성화층을 적층함으로써 Organic thin film transistor를 제작하여 이에 대한 특성을 연구하였다. Piezoelectric 방식의 잉크젯 프린팅을 이용하여 P3HT single drop jetting 시 두께 $150{\sim}200{\AA}$, 직경 약 70 ~ 80 um정도의 drop profile을 얻을 수 있었다. P3HT의 solvent로서 Chlorobenzene을 사용하여 농도 약 0.5 wt.%의 Ink-jet용 ink를 제작하여 이를 Channel Width 37, 236 um 크기의 Au 전극 위에 jetting 하여 각각의 특성을 측정하였다. 상기 실험은 상온의 외부환경에서 실시되었으며 실험 결과 최대 ${\mu}=1{\times}10^{-2}\;cm^2/Vsec$, $I_{on}/I_{off}=10^3{\sim}10^4$ 정도로서 off current가 높은 편이나 이동도 측면에서는 다른 방법의 박막 증착 실험결과와 비교할 때 동등 수준의 결과를 얻을 수 있었다.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.380-380
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• 2010

Currently, organic light-emitting diodes (OLEDs) have been proven of their readiness for commercialization in terms of lifetime and efficiency. In accordance with emerging new technologies, enhancement of light efficiency and extension of application fields are required. Particularly inverted structures, in which electron injection occurs at bottom and hole injection on top, show crucial advantages due to their easy integration with Si-based driving circuits for active matrix OLED as well as large open area for brighter illumination. In order to get better performance and process reliability, usually a proper buffer layer for carrier injection is needed. In inverted top emission OLED, the buffer layer should protect underlying organic materials against destructive particles during the electrode deposition, in addition to increasing their efficiency by reducing carrier injection barrier. For hole injection layers, there are several requirements for the buffer layer, such as high transparency, high work function, and reasonable electrical conductivity. As a buffer material, a few kinds of transition metal oxides for inverted OLED applications have been successfully utilized aiming at efficient hole injection properties. Among them, we chose 2 nm of $WO_3$ between NPB [N,N'-bis(1-naphthyl)-N,N'-diphenyl-1,1'-biphenyl-4,4'-diamine] and Au (or Al) films. The interfacial energy-level alignment and chemical reaction as a function of film coverage have been measured by using in-situ ultraviolet and X-ray photoelectron spectroscopy. It turned out that the $WO_3$ interlayer substantially reduces the hole injection barrier irrespective of the kind of electrode metals. It also avoids direct chemical interaction between NPB and metal atoms. This observation clearly validates the use of $WO_3$ interlayer as hole injection for inverted OLED applications.

• Korean Journal of Materials Research
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• v.19 no.1
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• pp.33-36
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• 2009

Inorganic-organic composite thin-film-transistors (TFTs) of ZnO nanowire/Poly(3-hexylthiophene) (P3HT) were investigated by changing the nanowire densities inside the composites. Crystalline ZnO nanowires were synthesized via an aqueous solution method at a low temperature, and the nanowire densities inside the composites were controlled by changing the ultrasonifiaction time. The channel layers were prepared with composites by spin-coating at 2000 rpm, which was followed by annealing in a vacuum at $100^{\circ}C$ for 10 hours. Au/inorganic-organic composite layer/$SiO_2$ structures were fabricated and the mobility, $I_{on}/I_{off}$ ratio, and threshold voltage were then measured to analyze the electrical characteristics of the channel layer. Compared with a P3HT TFT, the electrical properties of TFT were found to be improved after increasing the nanowire density inside the composites. The mobility of the P3HT TFT was approximately $10^{-4}cm^2/V{\cdot}s$. However, the mobility of the ZnO nanowire/P3HT composite TFT was increased by two orders compared to that of the P3HT TFT. In terms of the $I_{on}/I_{off}$ ratio, the composite device showed a two-fold increase compared to that of the P3HT TFT.

• Journal of the Korean institute of surface engineering
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• v.55 no.6
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• pp.460-468
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• 2022

Due to its high electrical conductivity, low contact resistance, good weldability and high corrosion resi-stance, gold is widely used in electronic components such as connectors and printed circuit boards (PCB). Gold ion salts currently used in gold plating are largely cyan-based salts and non-cyanic salts. The cya-nide bath can be used for both high and low hardness, but the non-cyanide bath can be used for low hardness plating. Potassium gold cyanide (KAu(CN)₂) as a cyanide type and sodium gold sulfite (Na₃[Au(SO)₃]₂) salt as a non-cyanide type are most widely used. Although the cyan bath has excellent performance in plating, potassium gold cyanide (KAu(CN)₂) used in the cyan bath is classified as a poison and a toxic substance and has strong toxicity, which tends to damage the positive photoresist film and make it difficult to form a straight side-wall. There is a need to supplement this. Therefore, it is intended to supplement this with an eco-friendly process using sodium sulfite sodium salt that does not contain cyan. Therefore, the main goal is to form a gold plating layer with a controllable hardness using a non-cyanide gold plating solution. In this study, the composition of a non-cyanide gold plating solution that maintains hardness even after annealing is generated through gold-palladium alloying by adding thallium, a crystal regulator among electrolysis factors affecting the structure and hardness, and changes in plating layer structure and crystallinity before and after annealing the correlation with the hardness.

• Korean Journal of Health Psychology
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• v.15 no.3
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• pp.483-498
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• 2010

This study is to examine the effects of emotion regulation strategies in facial expressions and emotional experiences, based on the facial expressions of groups, using antecedent- and response- focused regulation. 50 female undergraduate students were instructed to use different emotion regulation strategies during the viewing of a disgust inducing film. While watching, their facial expressions and emotional experiences were measured. As a result, participants showed the highest frequency of action units related to disgust in the EG(expression group), and they reported in the following order of DG(expressive dissonance group), CG(cognitive reappraisal group), and SG(expressive suppression group). Also, the upper region of the face reflected real emotions. In this region, the frequency of action units related to disgust were lower in the CG than in the EG or DG. The results of the PANAS indicated the largest decrease of positive emotions reported in the DG, but an increase of positive emotions reported in the CG. This study suggests that cognitive reappraisal to an event is a more functional emotion regulation strategy compared to other strategies related to facial expression and emotional experience that affect emotion regulation strategies.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.5-5
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• 2009

Thin-film-transistors (TFTs) that can be prepared at low temperatures have attracted much attention because of the great potential for transparent and flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited due to low field-effect mobility and rapid degradation after exposing to air. Alternative approach is the use of amorphous oxide semiconductors as a channel. Amorphous oxide semiconductors (AOSs) based TFTs showed the fast technological development, because AOS films can be fabricated at room temperature and exhibit the possibility in application like flexible display, electronic paper, and larges solar cells. Among the various AOSs, a-IGZO has lots of advantages because it has high channel mobility, uniform surface roughness and good transparency. [1] The high mobility is attributed to the overlap of spherical s-orbital of the heavy post-transition metal cations. This study demonstrated the effect of the variation in channel thickness from 30nm to 200nm on the TFT device performance. When the thickness was increased, turn-on voltage and subthreshold swing was decreased. The a-IGZO channels and source/drain metals were deposited with shadow mask. The a-IGZO channel layer was deposited on $SiO_2$/p-Si substrates by RF magnetron sputtering, where RF power is 150W. And working pressure is 3m Torr, at $O_2/Ar$ (2/28 sccm) atmosphere. The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. Finally, Al (150nm) as a gate metal was thermal-evaporated. TFT devices were heat-treated in a furnace at 250 $^{\circ}C$ and nitrogen atmosphere for 1hour. The electrical properties of the TFTs were measured using a probe-station. The TFT with channel thickness of 150nm exhibits a good subthreshold swing (SS) of 0.72 V/decade and on-off ratio of $1{\times}10^8$. The field effect mobility and threshold voltage were evaluated as 7.2 and 8 V, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.137-137
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• 2009

Thin-film transistors (TFTs) that can be prepared at low temperatures have attracted much attention due to the great potential for flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited by low field effect mobility or rapidly degraded after exposing to air in many cases. Another approach is amorphous oxide semiconductors. Amorphous oxide semiconductors (AOSs) have exactly attracted considerable attention because AOSs were fabricated at room temperature and used lots of application such as flexible display, electronic paper, large solar cells. Among the various AOSs, a-IGZO was considerable material because it has high mobility and uniform surface and good transparent. The high mobility is attributed to the result of the overlap of spherical s-orbital of the heavy pest-transition metal cations. This study is demonstrated the effect of thickness channel layer from 30nm to 200nm. when the thickness was increased, turn on voltage and subthreshold swing were decreased. a-IGZO TFTs have used a shadow mask to deposit channel and source/drain(S/D). a-IGZO were deposited on SiO2 wafer by rf magnetron sputtering. using power is 150W, working pressure is 3m Torr, and an O2/Ar(2/28 SCCM) atmosphere at room temperature. The electrodes were formed with Electron-beam evaporated Ti(30nm) and Au(70nm) structure. Finally, Al(150nm) as a gate metal was evaporated. TFT devices were heat treated in a furnace at $250^{\circ}C$ in nitrogen atmosphere for an hour. The electrical properties of the TFTs were measured using a probe-station to measure I-V characteristic. TFT whose thickness was 150nm exhibits a good subthreshold swing(S) of 0.72 V/decade and high on-off ratio of 1E+08. Field effect mobility, saturation effect mobility, and threshold voltage were evaluated 7.2, 5.8, 8V respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.11-11
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• 2010

Thin-film-transistors (TFTs) that can be deposited at low temperature have recently attracted lots of applications such as sensors, solar cell and displays, because of the great flexible electronics and transparent. Transparent and flexible transistors are being required that high mobility and large-area uniformity at low temperature [1]. But, unfortunately most of TFT structures are used to be $SiO_2$ as gate dielectric layer. The $SiO_2$ has disadvantaged that it is required to high driving voltage to achieve the same operating efficiency compared with other high-k materials and its thickness is thicker than high-k materials [2]. To solve this problem, we find lots of high-k materials as $HfO_2$, $ZrO_2$, $SiN_x$, $TiO_2$, $Al_2O_3$. Among the High-k materials, $Al_2O_3$ is one of the outstanding materials due to its properties are high dielectric constant ( ~9 ), relatively low leakage current, wide bandgap ( 8.7 eV ) and good device stability. For the realization of flexible displays, all processes should be performed at very low temperatures, but low temperature $Al_2O_3$ grown by sputtering showed deteriorated electrical performance. Further decrease in growth temperature induces a high density of charge traps in the gate oxide/channel. This study investigated the effect of growth temperatures of ALD grown $Al_2O_3$ layers on the TFT device performance. The ALD deposition showed high conformal and defect-free dielectric layers at low temperature compared with other deposition equipments [2]. After ITO was wet-chemically etched with HCl : $HNO_3$ = 3:1, $Al_2O_3$ layer was deposited by ALD at various growth temperatures or lift-off process. Amorphous InGaZnO channel layers were deposited by rf magnetron sputtering at a working pressure of 3 mTorr and $O_2$/Ar (1/29 sccm). The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. The TFT devices were heat-treated in a furnace at $300^{\circ}C$ and nitrogen atmosphere for 1 hour by rapid thermal treatment. The electrical properties of the oxide TFTs were measured using semiconductor parameter analyzer (4145B), and LCR meter.