• Title/Summary/Keyword: Asynchronous Communication

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FPGA Design and SoC Implementation of Constant-Amplitude Multicode Bi-Orthogonal Modulation (정진폭 다중 부호 이진 직교 변복조기의 FPGA 설계 및 SoC 구현)

  • Hong, Dae-Ki;Kim, Yong-Seong;Kim, Sun-Hee;Cho, Jin-Woong;Kang, Sung-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.11C
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    • pp.1102-1110
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    • 2007
  • In this paper, we design the FPGA (Field-Programmable Gate Array) of the CAMB (Constant-Amplitude Multi-code Biorthogonal) modulation, and implement the SoC (System on Chip). The ASIC (Application Specific Integrated Circuit) chip is be implemented through targeting and board test. This 12Mbps modem SoC includes the ARM (Advanced RISC Machine)7TDMI, 64Kbyte SRAM(Static Random Access Memory) and ADC (Analog to Digital Converter)/DAC (Digital to Analog Converter) for flexible applications. Additionally, the modem SoC can support the variable communication interfaces such as the 16-bits PCMCIA (Personal Computer Memory Card International Association), USB (Universal Serial Bus) 1.1, and 16C550 Compatible UART (Universal Asynchronous Receiver/Transmitter).

A Robust Decorrelating Multiuser Detector for Asynchronous DS/CDMA Communication Systems (비동기 DS/CDMA 시스템을 위한 역상관 다중사용자 검출기)

  • Yoon, Seok-Hyun;Lee, Kyung-Ha;Hong, Kwang-Seok
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.35S no.6
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    • pp.1-8
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    • 1998
  • This paper presents an asynchronous DS/CDMA multiuser detector, which is a two stage, symbol-by-symbol scheme consisting of conventional detectors followed by linear decorrelating detectors. The conventional detector first makes temporal decisions and the detected symbols are delayed by one symbol period to be used for the selection of decorrelating bases in the subsequent decorrelaing detection stage. It also employs a bank of early-late correlators in place of a bank of single correlators taking the small offset of chip timing asynchronism into account. The proposed detector requires only the coarse knowledge of relative time delays of interfering users and is suitable for digital implementation. To verify the detector performance, the analytical BER performance will be given and compared with the simulation results for BPSK DS/CDMA signals in AWGN channel. While the performance of the proposed detector will be analyzed for time-limited signal, the simulation is carried out for both the time-limited and band-limited signals. As can be seen in the simulation results, the proposed scheme shows good results.

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Performance Analysis of a Concatenated Coded DS/CDMA System in Asynchronous Rayleigh Fading Channels (비동기 레일리 감쇄 채널에서 쇄상부호 직접수열 부호분할 다중접속 시스템의 성능분석)

  • Kim, Kwang-Soon;Song, Iick-Ho;Yoon, Seok-Ho;Kim, Hong-Gil;Lee, Yong-Up
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.36S no.9
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    • pp.1-8
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    • 1999
  • In this paper, we propose and analyze a concatenated coding scheme for DS/CDMA systems in asynchronous channels. In the concatenated coding, bandwidth efficient $2^{2L-2}$-state ${\frac{L}{L+1}}$-rate 2-MTCM with biorthogonal signal constellation is used for the inner code, and $(2^{L-1},\;{\lceil}\frac{2^{L-1}}{L/2}{\rceil})$ RS code is use for the outer code. It is shown that we can get considerable performance gain over the uncoded system without sacrificing the data transmission rate. The proposed system can be used as a coding scheme for reliable and high speed integrated information services of mobile communication systems.

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LP-MAC Technique in association with Low Power operation in unmanned remote wireless network (무인원격 무선 네트워크 환경에서의 저전력 운용을 고려한 LP-MAC 기법)

  • Youn, Jong-Taek;Ryu, Jeong-Kyu;Kim, Yongi
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.8
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    • pp.1877-1884
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    • 2014
  • Because of the limited power resource, we need a reliable low-power media access control technique suitable for unmaned remote sensor operation condition for the unmanned sensor processor to perform the task in the remote wireless network situation. Therefore CSMA/CA and X-MAC is generally considered to effectively transmit the signal in the low-power wireless network. In this paper, we propose the more efficient low-power LP-MAC Technique which consumes the minimum power and transmits the data faster in condition that the mobile nodes' joining to and leaving from the network which consists of the fixed nodes is fluid. The fixed nodes operate in an asynchronous mode to perform the network self-configuration and transmit data faster to the mobile node which is frequently join and leave the network. When the mobile node leaves the network, the network's operation mode will be synchronous mode to achieve the minimum power consumption, thus the minimum power operation becomes possible.

Dynamic Transaction Processing in Distributed Real-Time Systems (실시간 분산 시스템을 위한 동적 트랜잭션 처리)

  • Yun, Yong-Ik
    • Journal of KIISE:Computing Practices and Letters
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    • v.5 no.6
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    • pp.738-747
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    • 1999
  • 본 논문에서는 분산 실시간 시스템의 특징인 분산 처리 과정의 신뢰성을 지원하기 위한 동적 트랜잭션 처리 구조를 연구하였다. 실시간 분산 처리 환경에서 동적으로 발생하는 실시간 분산 트랜잭션 처리를 위하여 트랜잭션 내에 필수적인 3가지 언어적 특성들을 제시하였다. 첫째는 트랜잭션 내에 실시간 시스템의 가장 중요한 특징인 시간적인 제약 조건들을 정의 할 수 있는 방안을 제시하고, 둘째는 비동기적인 처리 성격을 지닌 실시간 특성을 고려한 비동기적 트랜잭션 처리 방법을 제시한다. 또한, 분산 처리 과정에서 발생되는 예외 사항들을 처리하기 위하여 긴급성을 고려한 다중레벨 우선순위 스케줄링 (Multi-Level Priotiry Scheduling)이라 부르는 트랜잭션 스케줄링 방안을 제시한다. 그리고, 제시한 실시간 분산 트랜잭션 처리 구조의 타당성 및 가능성을 입증하기 위한 실시간 트랜잭션 처리 과정을 시물레이션을 통하여 제시한 언어적 특성에 대한 고려 사항들을 보여준다.Abstract We propose a dynamic transaction processing model that supports a reliability for distributed real-time processing. For the dynamic processing in distributed real-time transaction systems, we suggest three features that are defined in programming language. First, we propose a specification model to explicitly define the time constraints, needs in real-time distributed processing. Second, we describe an asynchronous transaction processing mechanism based on the real-time characteristics. So, we suggest three communication primitives to support asynchronous transaction processing. Lastly, a scheduling policy based on urgent transaction is suggested to manage the exception occurred during the distributed processing. This scheduling policy is called multi-level priotiry scheduling (MPLS). Based on three features and scheduling policy, we describe a direction to manage a dynamic transaction processing in distributed real-time systems.

Asynchronous Sensing Data Aggregation and Processing Mechanism for Internet of Things Environment (사물 인터넷 환경에서 비동기 센싱 데이터 수집 및 처리 메커니즘)

  • Kang, Yunhee;Ko, Wan-Ki
    • KIPS Transactions on Computer and Communication Systems
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    • v.3 no.11
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    • pp.403-408
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    • 2014
  • In the Internet of Things(IoT) era, many of the things or objects that enclose our environments are able to associate with those things on the Internet. To construct IoT systems, it needs to consider a component for acquiring and aggregating of sensory data via things with sensors and instruments, which is connected by diverse networks, in IoT environment. An IoT system is intrinsically distributed in a variety of ways. In addition, to manage an IoT system efficiently, interoperability is needed to meet requirements while the IoT system is designed to deliver data among its applications. In this paper, a reference architecture based on asynchronous messaging is defined and used for designing an IoT system. To apply the architecture, we discuss how to manage data streams with real-time characteristics and make a prototype based on pipe-and-filter to produce and consume them by a pub/sub messaging system NaradaBrokering.

Design of a Binary Adder Structure Suitable for High-Security Public Key Cryptography Processor (고비도 공개키 암호화 프로세서에 적합한 이진 덧셈기의 구조 연구)

  • Moon, Sang-Gook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.11
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    • pp.1976-1979
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    • 2008
  • Studies on binary adder have been variously developed. According to those studies of critical worst delay and mean delay time of asynchronous binary adders, carry select adders (CSA) based on hybrid structure showed 17% better performance than ripple carry adders (RCA) in 32 bit asynchronous processors, and 23% better than in 64 bit microprocessor implemented. In the complicated signal processing systems such as RSA, it is essential to optimize the performance of binary adders which play fundamental roles. The researches which have been studied so far were subject mostly to addition algorithms or adder structures. In this study, we analyzed and designed adders in an asp;ect of synthesis method. We divided the ways of implementing adders into groups, each of which was synthesized with different synthesis options. Also, we analyzed the variously implemented adders to evaluate the performance and area so that we can propose a different approach of designing optimal binary adders.

A study on the receiving rate of the data of the hybrid communication system using data transfer methods for controller system of navigational aids (데이터 전송방식에 따른 항로표지 관리용 하이브리드 통신 시스템의 수신율 분석에 관한 연구)

  • Jeon, Joong Sung
    • Journal of Advanced Marine Engineering and Technology
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    • v.38 no.1
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    • pp.78-85
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    • 2014
  • The Mu-communication board supported by hybrid communication is designed with Cortex M3, which is a low power energy consumption 32-bit microcontroller. The Cortex M3 microcontroller has UART(Universal asynchronous receiver/transmitter) ports which can set appropriately using the command line interpreter (CLI) program with each port. URAT ports are used for hybrid communication modems, GPS modules, etc. When the socket type was compared with the short message service type, the socket type was proven to be better. By improving the receiving performance in the control and management system of the AtoN, data loss was minimized. During the testing of the socket and SMS, data was collected from each buoy for 12 hours every 1 minute and the receiving rate of the data was found to be more than 98.58 % and 99.42 % respectively.

System Phase Noise for Mobile Satellite Communication Service (이동형 위성통신 서비스를 위한 시스템 위상 잡음)

  • Kim, Young-Wan;Jang, Myeong-Shin;Baek, Wha-Jong
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.1
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    • pp.735-738
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    • 2005
  • The phase error in the digital transmission system are generated by random phase noise and tracking phase error due to doppler phenomenon. In the mobile satellite communication system that generates the doppler frequency, which is a system with a movement, the proper system phase noise spectrum should be designed based on analyses for phase noise and static phase error effects. Based on the analyses of the doppler frequency and the phase error for bilateral satellite communication system providing an asynchronous service, the phase noise spectrums for the mobile satellite communication are designed in this paper. Also, the available transmission services under the less doppler effect are proposed and the proper signal source units for a required transmission system can be designed under the proposed system phase noise spectrum.

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Performance Analysis of the Multi-User Detector Employing a Hybrid Interference Cancellation Scheme in a WCDMA System (WCDMA 시스템에서 Hybrid Interference Cancellation 기법을 적용한 다중사용자 검파기의 성능분석)

  • 서정욱;오창헌;장은영;조성준
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.2
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    • pp.221-227
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    • 2002
  • In this paper, in order to know the effect of the interference, we have analyzed the BER (Bit Error Rate) performance of the MUD(Multi-User Detector) employing HIC(Hybrid Interference Cancellation) scheme for the asynchronous WCDMA system based on 3GPP(3rd Generation Partnership Project) Spec. through the In this paper, in order to know the effect of the interference, we have analyzed the BER (Bit Error Rate) performance of the MUD(Multi-User Detector) employing HIC(Hybrid Interference Cancellation) scheme for the asynchronous WCDMA system based on 3GPP(3rd Generation Partnership Project) Spec. through the computer simulation. we have assumed Rayleigh fading channel. And we have compared its BER performance with SIC's(Successive Interference Cancellation) and with PIC's(Parallel Interference Cancellation), which are the representative schemes in the subtractive interference cancellation. From the results, it is shown that PlC or HIC is effective for high data-rate users and SIC of HIC for low data-rate users to eliminate the interference. Regardless of the data rate, it is reasonable to use the HIC structure for WCDMA system to satisfy all of users' services. The reason is that the SIC scheme in front of HIC can guarantee the performance of low power users to cancel the serious interference caused by the high power users, while PIC in the rear of it can guarantee the performance of high power users to cancel the interference caused by the low power users.