• 한국전기전자재료학회논문지
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• 제11권1호
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• pp.7-11
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• 1998

In this paper, a new synapse cell with nonvolatile SONOS semiconductor memory device is proposed and it's fundamental function electronically implemented SONOS NVSM has shown characteristics that the memory value, synaptic weights, can be increased or decreased incrementally. A novel SONOS synapse is used to read out the stored analog value. For the purpose of synapse implementation using SONOS NVSM, this work has investigated multiplying characteristics including weight updating characteristics and neuron output characteristics. It is concluded that SONOS synapse cell has good agreement for use as a synapse in artificial neural networks.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2007년도 하계종합학술대회 논문집
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• pp.475-476
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• 2007

The stress induced leakage currents will affect data retention in synapse transistors and the stress current, transient current is used to estimate to fundamental limitations on oxide thicknesses. The synapse transistor made by thin silicon oxides has represented the neural states and the manipulation which gaves unipolar weights. The weight value of synapse transistor was caused by the bias conditions. Excitatory state and inhibitory state according to weighted values affected the channel current. The stress induced leakage currents affected excitatory state and inhibitory state.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1991년도 추계학술대회 논문집
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• pp.1-4
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• 1991

EEPROM technology has been used for storing analog weights as charge in a nitride layer between gate and channel of a field effect transistor. In the view of integrity and fabrication process, it is essentially required that SONOSFET is capable of performing synapse function as a basic element in an artificial neural networks. This work has introduced the VLSI implementation for synapses including current study and also investigated physical characteristics to implement synapse circuit using SONOSFET memories. Simulation results are shown in this work. It is proposed that multiplication of synapse element using SONOSFET memories will be developed more compact implementation under Present fabrication processes.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1996년도 추계학술대회 논문집
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• pp.1-4
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• 1996

EEPROM technology has been used for storing analog weights as charge in a nitride layer between gate and channel of a field effect transistor. In the view of integrity and fabrication process, it is essentially required that SONOSFET is capable of performing synapse function as a basic element in an artificial neural networks. This work has introduced the VLSI implementation for synapses including current study and also investigated physical characteristics to implement synapse circuit using SONOSFET memories. Simulation results are shown in this work. It is proposed that multiplication of synapse element using SONOSFET memories will be developed more compact implementation under Present fabrication processes.

• 한국전기전자재료학회논문지
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• 제35권3호
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• pp.215-222
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• 2022

Artificial neuromorphic devices are considered the key component in realizing energy-efficient and brain-inspired computing systems. For the artificial neuromorphic devices, various material candidates and device architectures have been reported, including two-dimensional materials, metal-oxide semiconductors, organic semiconductors, and halide perovskite materials. In addition to conventional electrical neuromorphic devices, optoelectronic neuromorphic devices, which operate under a light stimulus, have received significant interest due to their potential advantages such as low power consumption, parallel processing, and high bandwidth. This article reviews the recent progress in optoelectronic neuromorphic devices using various active materials such as two-dimensional materials, metal-oxide semiconductors, organic semiconductors, and halide perovskites

• 제어로봇시스템학회논문지
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• 제21권5호
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• pp.477-481
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• 2015

Implementation of memristor-based multilayer neural networks and their hardware-based learning architecture is investigated in this paper. Two major functions of neural networks which should be embedded in synapses are programmable memory and analog multiplication. "Memristor", which is a newly developed device, has two such major functions in it. In this paper, multilayer neural networks are implemented with memristors. A Random Weight Change algorithm is adopted and implemented in circuits for its learning. Its hardware-based learning on neural networks is two orders faster than its software counterpart.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 G
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• pp.2977-2979
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• 1999

본 논문에서는 MEBP(Modified Error Back-Propagation) 학습 규칙을 간단한 비선형 회로를 이용하여 구현하였다. 인공 신경 회로망(ANNs : Artificial Neural Networks)은 많은 수의 뉴런을 필요하기 때문에 표준 CMOS 기술을 이용하는 간단한 비선형 시냅스(synapse) 회로는 인공 신경 회로망 구현에 적합하다. 학습회로는 비선형 시냅스 회로. 시그모이드(sigmoid) 회로. 그리고 선형 곱셈기로 구성되어 있다. 학습 회로의 출력은 각 입력 패턴에 따라 유일한 값으로 결정되어진다. 제안한 학술회로를 $2{\times}2{\times}1$과 $2{\times}3{\times}1$ 다층 feedforward 신경 회로망 모델에 적용하였다. MEBP 하드웨어 구현은 HSPICE 회로 시뮬레이터를 이용하여 검증하였다. 제안한 학술 회로는 on-chip 학습회로를 포함한 대규모 신경회로망 구현에 매우 적합하리라 예상된다.

• 한국콘텐츠학회논문지
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• 제18권11호
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• pp.655-664
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• 2018

망막은 눈을 통해 입력되는 빛을 수용하여, 이를 전기신호로 변환한 후 뇌의 시각 피질에 전달하는 역할을 수행한다. 망막을 하드웨어로 구현하기 위해서는 망막의 구조와 동작에 대한 이해가 필요하며, 이를 위해 망막의 모델링이 유용할 수 있다. 본 논문에서는 척추동물의 망막을 구성하는 신경세포와 시냅스의 신호 전달 경로를 포함하는 2-D 망막 네트워크 모델을 소개한다. 또한 수치해석을 기반으로 다양한 조건에서 망막 모델을 해석하기 위해 시뮬레이터를 개발하였다. 이를 통해 다양한 세기의 빛이 망막에서 흡수되었을 때, 기존의 연구와 대비하여, 각 세포와 시냅스 노드 단위로 입출력 반응을 정밀하게 검증하여 인공망막 장치 개발에 기여하였다.

• 전자통신동향분석
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• 제38권6호
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• pp.62-74
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• 2023

In response to diverse external stimuli, sensory receptors generate spiking nerve signals. These generated signals are transmitted to the brain along the neural pathway to advance to the stage of recognition or perception, and then they reach the area of discrimination or judgment for remembering, assessing, and processing incoming information. We review research trends in neuromorphic sensory perception technology inspired by biological sensory perception functions. Among the various senses, we consider sensory nerve decoding technology based on sensory nerve pathways focusing on touch and smell, neuromorphic synapse elements that mimic biological neurons and synapses, and neuromorphic processors. Neuromorphic sensory devices, neuromorphic synapses, and artificial sensory memory devices that integrate storage components are being actively studied. However, various problems remain to be solved, such as learning methods to implement cognitive functions beyond simple detection. Considering applications such as virtual reality, medical welfare, neuroscience, and cranial nerve interfaces, neuromorphic sensory recognition technology is expected to be actively developed based on new technologies, including combinatorial neurocognitive cell technology.

• 접착 및 계면
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• 제25권2호
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• pp.43-49
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• 2024

최근 유연 유기 시냅스 트랜지스터(flexible organic synaptic transistor, FOST)는 유기 반도체를 채널층으로 하여 유연성, 생체 적합성, 손쉬운 공정성, 복잡성 감소로 인해 주목받고 있다. 또한 기존의 무기 시냅스 소자에 비해 간단한 구조와 낮은 제조 비용으로 인간 뇌의 가소성을 모방할 수 있으므로 차세대 웨어러블 장치 및 소프트 로보틱스 기술에 적용이 가능하다. 유연 유기 시냅스 트랜지스터에서 유기 기판은 소자의 준비 온도에 민감하고 고온 처리 공정은 유기 기판의 열변형을 일으켜 고성능 소자를 제조하기 위해서는 저온용액 기반의 공정 기술이 필요하다. 본 총설에서는 저온 용액 기반 유연 유기 시냅스 트랜지스터 소자의 최신 공정 기술 연구 상황을 요약하고, 이에 따른 문제점과 해결해야 할 과제를 제시하고자 한다.