• Proceedings of the KIPE Conference
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• 2004.07a
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• pp.121-124
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• 2004

In this paper, Simple and inexpensive analog maximum power point tracker (MPPT) algorithm for photovoltaic power system and low power system of doesn't use digital signal processor (DSP). The control circuit is composed such that the actual current and voltage are sensed directly from the PV array. These two signals are then multiplied by a single-chip multiplier. The multiplier output go through different time constants genesis pulse width modulated to switch. Finally those were verified through simulation.

• Journal of Korean Medicine for Obesity Research
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• v.7 no.2
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• pp.39-44
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• 2007

Objectives In recent years, we are concerned about anti-aging and longevity. And I heard that Mori Fructus has been used for promotion of health in local clinics. So I wanted to know immuno-ability of Mori Fructus and carried out this experiment. Methods We cultivated 3T3-L1 Preadipocytes and Protein chip used for $ProteoPlex^{TM}$ 16-Well Murine Cytokine Array Kit. Results We known the immunity of Mori Fructus about 3T3-L1 Preadipocytes and gained the increase of Cytokines(IL-2, IL-4, IL-12p70, GM-CSF, INF-${\gamma}$, TNF-${\alpha}$). Conclusions So I guess that Mori Fructus has effect of immuno-ability, etc.

• 제어로봇시스템학회:학술대회논문집
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• 1996.10b
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• pp.109-112
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• 1996

The more integrated and smaller SMD are needed, new solder joints packaging technologies are developed in these days such as BGA(Ball Grid Array), Flip Chip, J-lead etc. But, it's unable to inspect solder joints in those devices by visual inspection methods, because they are hided by it's packages. To inspect those new SMD packages, an X-ray system for acquiring a cross-sectional image of a arbitrary plane is necessary. In this paper, an analysis for designing X-ray cross sectional imaging system is presented including the way for correcting the distortion of image intensifier. And we show computer simulation of that system with a simple PCB model to show it's usefulness in applying PCB solder joint inspection.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.2
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• pp.184-188
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• 2014

There is a trade-off between read stability and writability under a full-/half-select condition in static random access memory (SRAM). Another trade-off in the minimum operating voltage between the read and write operation also exists. A new peripheral circuit for SRAM arrays, called a variation sensor, is demonstrated here to balance the read/write margins (i.e., to optimize the read/write trade-off) as well as to lower the minimum operation voltage for both read and write operations. A test chip is fabricated using an industrial 45-nm bulk complementary metal oxide semiconductor (CMOS) process to demonstrate the operation of the variation sensor. With the variation sensor, the word-line voltage is optimized to minimize the trade-off between read stability and writability ($V_{WL,OPT}=1.055V$) as well as to lower the minimum operating voltage for the read and write operations simultaneously ($V_{MIN,READ}=0.58V$, $V_{MIN,WRITE}=0.82V$ for supply voltage $(V_{DD})=1.1V$).

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.97-101
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• 2013

There is a growing need for optical communication systems that convert large volumes of data to optical signals and that accommodate and transmit the signals across long distances. Digital optical communication consists of a master unit (MU) and a slave unit (SU). The MU transmits data to SU using digital optical signals. However, digital optical units that are commercially available or are under development transmit data using two's complement representation. At low input levels, a large number of SSOs (simultaneous switching outputs) are required because of the high rate of bit switching in two's complement, which thereby increases the power noise. This problem reduces the overall system capability because a DSP (digital signal processor) chip (FPGA, CPLD, etc.) cannot be used efficiently and power noise increases. This paper proposes a change from two's complement to a more efficient method that produces less SSO noise and can be applied to existing digital optical units.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.7
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• pp.28-37
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• 1997

In this paper, we designed a motion estimator for MPEG-2 video coder using VHDL. Motion estimation is indispensable for encoding MPEG 2 video. Motion estimation takes over 50% computation power of video encoding 37 frames per second and is suitable for real-time processing. The number of data accesses for computation is fewer than 2 times compared with that of old one. This makes slower memory module available. We minimize input pins to migrate input data through PEs. This processor can compute various motio estimation modes at one calculation that is supported by MPEG-2 video standard. Also independent control architecture makes this processor a single processor or a sub module in amultimedia chip.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.274-277
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• 1999

The paper describes a implementation of space vector pulse-width modulation (SVPWM) voltage source inverter using Field Programmable Gate Array(FPGA) for a induction motor control system. The implemented chip is included logic circuits for SVPWM, dead time compensation and speed detection using Quick Logic, QL16X24B. The maximum operating frequency and delay time can be set to 110MHz and 6 nsec. The designed FPGA for SVPWM can be incorporated with a digital signal processing to provide a simple and effective solution for high performance voltage source inverter drives. Simulation and Implementation results are shown to verify the usefulness of FPGA as a Application Specific Integrated Circuit(ASIC) in power electronics applications

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.1
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• pp.88-95
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• 2013

We propose a novel driver circuit design using $0.18{\mu}m$ CMOS process technology that drives a 1550 nm high-speed VCSEL used in optical transceiver. We report a distinct improvement in bandwidth, voltage gain and eye diagram at 3.1Gb/s data rate in comparison with existing topology. In this paper, the design and layout of a 3.1Gb/s VCSEL driver for optical transceiver having arrayed multi-channel of integrating module is confirmed.

• 제어로봇시스템학회:학술대회논문집
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• 2002.10a
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• pp.97.6-97
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• 2002

In this paper, we present an arrayed flexible tactile sensor, which can detect contact normal forces as well as positions. The tactile sensor is developed using Polyvinylidene Fluoride (PVDF) that is known as piezoelectric polymer, and the surface electrode is fabricated using silk-screening technique with silver. We develop a charge amplifier in order to amplify the small signal from the sensor, and a fast signal processing unit by using a DSP chip. The developed tactile sensor is physically flexible and it can be deformed three-dimensionally to any shape so that it can be placed on anywhere on the curved surface. In the future, the developed sensor is applied to a dexterous robotic hand...$\textbullet$ Tactile sensing, PVDF, Robot hand

• Transactions of the Korean Society of Mechanical Engineers A
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• v.26 no.7
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• pp.1302-1308
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• 2002

Thermo-mechanical and flexural behavior of a wire-bond plastic ball grid array (WB-PBGA) package are characterized by high sensitive moire interferometry. Moire fringe patterns are recorded and analyzed for several bending loads and temperatures. At the temperature higher than $100^{\circ}C$, the inelastic deformation in solder balls become more dominant, so that the bending of the molding compound decreases while temperature increases. The deformation caused by thermally induced bending is compared with that caused by mechanical bending. The strain results show that the solder ball located at the edge of the chip has largest shear strain by the thermal load while the maximum average shear strain by the bending moment occurs in the end solder.