• 한국생물공학회:학술대회논문집
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• 2003.10a
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• pp.683-686
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• 2003

While genetically modified organisms (GMOs) are producing in many countries, issues related to safeties of GMOs as foods for human have risen. Because of such potential problems, the development of an indication system regarding GMO content contained in foods has been required. Particularly, an immune-chip, as widely demanded diagnostic tool for functional, structural analyses of proteins, has been investigated to simultaneously measure different analytes. We have developed methods for immobilizing antibody on glass surfaces as substrate and for generating chemiluminometric signals.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2003.09b
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• pp.122-125
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• 2003

By advent of NNC(Neural Network Chip), it is possible that process in parallel and discern the importance of signal with learning oneself by experience in external signal. So, the design of general purpose operation unit using VHDL(VHSIC Hardware Description Language) on the existing FPGA(Field Programmable Gate Array) can replaced EN(Expert Network) and learning algorithm. Also, neural network operation unit is possible various operation using learning of NN(Neural Network). This paper present general purpose operation unit using hierarchical structure of EN EN of presented structure learn from logical gate which constitute a operation unit, it relocated several layer The overall structure is hierarchical using a module, it has generality more than FPGA operation unit.

• ETRI Journal
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• v.36 no.3
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• pp.498-501
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• 2014

A C-band 50 W high-power microwave monolithic integrated circuit amplifier for use in a phased-array radar system was designed and fabricated using commercial $0.25{\mu}m$ AlGaN/GaN technology. This two-stage amplifier can achieve a saturated output power of 50 W with higher than 35% power-added efficiency and 22 dB small-signal gain over a frequency range of 5.5 GHz to 6.2 GHz. With a compact $14.82mm^2$ chip area, an output power density of $3.2W/mm^2$ is demonstrated.

• Journal of Mechanical Science and Technology
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• v.18 no.9
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• pp.1572-1581
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• 2004

The purposes of the paper are to apply the axiomatic design methodology to the design of PBGA package with polyimide coating under hygrothermal loading in the IR soldering process and to suggest more reliable design conditions by stress analysis. The analysis model is a 256-pin perimeter Plastic Ball Grid Array (PBGA) package with the polyimide coating surrounding chip and above surface of BT-substrate. The polyimide coating is suggested to depress the maximum stresses occurred on the stress concentration positions. The axiomatic design methodology is proved to be useful to find the more reliable design conditions for PBGA package. Finally, the optimal values of design variables to depress the stress in the PBGA package are obtained.

• Journal of Institute of Control, Robotics and Systems
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• v.6 no.2
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• pp.228-233
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• 2000

It is common to apply the technology of FPGA (Fie이 Programmable Gate Array) which is one of the design methods for ASIC(Application Specific IC)to the active components used in the data processing at the digital system of satellite aircraft missile etc for compact lightness and integration of Printed Circuit Board (PCB) In carrying out the digital data processing the FPGAs are designed for the various functions of the Process Control Interrupt Control Clock Generation Error Detection and Correction (EDAC) as the individual module. In this paper an FPGA chip for Single Error Correction and Double Error Detection (SEC-DED) for EDAC is designed and simulated by using a VLSI design software LODECAP.

• Proceedings of the KIEE Conference
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• 1991.07a
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• pp.857-860
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• 1991

This paper describes a High-Speed 8-bit Current-Mode BiCMOS A/D Converter. The characteristics of this A/D Converter are as fellows. First, as ADC is operating in current-mode we can obtain the properties of increase of converting speed, low noise, and wideband. Second, the properties of high switching speed in bipolar transistor and of high packing density, low power consumption in MOS trnsistor are combined. Finally we reduce chip area by designing it with subranging mode and improve the converting speed by performing subtraction directly, which doesn't need D/A convertings, using current switching element. This converter is composed of two 4-bit ADC, current soure array which provides signal and reference current, current comparator and encoding network.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.16 no.2
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• pp.145-154
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• 1991

In this dissertation, the same reading and writing operation of general SRAM, the algonthm and hardware of 8 bit $\times$16 word CAM(Content Addressable Memory) which carry out the parallel that search is presented. The designed CAM chip consists of five functional blocks (CAM cell array, Address Deceden, Address Encoden. Data Selector, Sense Amplifier). The smulation is performed using logic smmulator on Apollo workstation and PSPICE eitcut simulation on PC/AT. The designed CAM was fabricated by 3um CMOS N Well process (ETRI) design nitles and testing was performed.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.6
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• pp.1178-1182
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• 2011

The best methods for distribution controled of LED lighting fixtures is control to designed LED chip array, lens and reflector. However, lens design need distribution design to reflector for low-wattage LED lighting because of difficulty of production and reduction of light efficiency. In addition, it needs maximize of thermal performance to improve the efficiency and reliability of device. As a result, for the height of reflector 40[mm] and Inclination 25[$^{\circ}$], we can see the best distribution properties, and, in the thermal properties, junction temperature MCPCB 62.9 [$^{\circ}C$], FR4 PCB 89.6 [$^{\circ}C$], FR4 PCB from Via-hole is 63.1 [$^{\circ}C$]. it may improve for thermal properties for makes the Via-hole.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1627_1628
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• 2009

도로 교통에서의 보행자 안전을 위해 광양자테 레이저 어레이를 이용한 첨단 교통 신호 시스템 응용 기술을 소개한다. 저소비 전력 및 온도 특성이 뛰어난 광양자테 레이저는 대규모 어레이로 제작이용이하며 고속 모듈레이션 및 색순도 등이 뛰어나 광학 투사 시스템을 이용해 고해상도의 글자체 및 영상 구현이 가능하다. 횡단 보도 인근에 고집적, 고출력의 글자체 광양자테 레이저 어레이를 도로 바닥에 투사 및 영상화 시킴으로써 운전자 및 보행자의 교통 사고 예방에 획기적인 효과를 가져올 것으로 기대된다.

• Proceedings of the KIPE Conference
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• 2004.07a
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• pp.121-124
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• 2004

In this paper, Simple and inexpensive analog maximum power point tracker (MPPT) algorithm for photovoltaic power system and low power system of doesn't use digital signal processor (DSP). The control circuit is composed such that the actual current and voltage are sensed directly from the PV array. These two signals are then multiplied by a single-chip multiplier. The multiplier output go through different time constants genesis pulse width modulated to switch. Finally those were verified through simulation.