• Title/Summary/Keyword: Array Gain

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Characterization of Pv92, a Novel Merozoite Surface Protein of Plasmodium vivax

  • Lee, Seong-Kyun;Wang, Bo;Han, Jin-Hee;Nyunt, Myat Htut;Muh, Fauzi;Chootong, Patchanee;Ha, Kwon-Soo;Park, Won Sun;Hong, Seok-Ho;Park, Jeong-Hyun;Han, Eun-Taek
    • Parasites, Hosts and Diseases
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    • v.54 no.4
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    • pp.385-391
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    • 2016
  • The discovery and understanding of antigenic proteins are essential for development of a vaccine against malaria. In Plasmodium falciparum, Pf92 have been characterized as a merozoite surface protein, and this protein is expressed at the late schizont stage, but no study of Pv92, the orthologue of Pf92 in P. vivax, has been reported. Thus, the protein structure of Pv92 was analyzed, and the gene sequence was aligned with that of other Plasmodium spp. using bioinformatics tools. The recombinant Pv92 protein was expressed and purified using bacterial expression system and used for immunization of mice to gain the polyclonal antibody and for evaluation of antigenicity by protein array. Also, the antibody against Pv92 was used for subcellular analysis by immunofluorescence assay. The Pv92 protein has a signal peptide and a sexual stage s48/45 domain, and the cysteine residues at the N-terminal of Pv92 were completely conserved. The N-terminal of Pv92 was successfully expressed as soluble form using a bacterial expression system. The antibody raised against Pv92 recognized the parasites and completely merged with PvMSP1-19, indicating that Pv92 was localized on the merozoite surface. Evaluation of the human humoral immune response to Pv92 indicated moderate antigenicity, with 65% sensitivity and 95% specificity by protein array. Taken together, the merozoite surface localization and antigenicity of Pv92 implicate that it might be involved in attachment and invasion of a merozoite to a new host cell or immune evasion during invasion process.

Matched Field Processing Experiment in the East Sea of Korea Characterized by Short Period Fluctuating Temperature: MAPLE 0310 (수온의 단주기 변동이 있는 동해에서의 정합장처리 실험 : MAPLE 0310)

  • Kim Seongil;Hong Jun-Suk;Kim Eui-Hyung;Kim Young-Gyu;Park Joung-Soo
    • The Journal of the Acoustical Society of Korea
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    • v.24 no.6
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    • pp.317-324
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    • 2005
  • Detection and localization of a quiet target in shallow water environments is a challenging problem because of the complicated acoustic Propagation and the Prevalence of loud surface ship interference. Matched Field Processing (MFP) can help address the concern by using a Propagation model to determine the steering vectors, thus Providing optimal away gain and localization accuracy. However, Performance of MFP have yet realized in practice, for several reasons. The most important limitation is that precise information on the underwater environments is generally not available. To examine the Performance of MFP in the East Sea of Korea, we have accomplished a series of matched acoustic Properties and localization experiment (MAPLE). We analyzed the array data measured from MAPLE which is accomplished using a vertical line array and a towed acoustic source off the east cost of Korea in Oct. 2003. We localized the acoustic source using MFP. It is well known that the temperature structure in the experimental site is affected by the short period fluctuation such as internal wave. In this paper, it is found that the sidelobe level on the MFP ambiguity surface is increased being affected by the short period fluctuation.

A GaAs MMIC Multi-Function Chip with a Digital Serial-to-Parallel Converter for an X-band Active Phased Array Radar System (X-대역 능동 위상 배열 레이더 시스템용 디지털 직병렬 변환기를 포함한 GaAs MMIC 다기능 칩)

  • Jeong, Jin-Cheol;Shin, Dong-Hwan;Ju, In-Kwon;Yom, In-Bok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.6
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    • pp.613-624
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    • 2011
  • An MMIC multi-function chip for an X-band active phased array radar system has been designed and fabricated using a 0.5 ${\mu}m$ GaAs p-HEMT commercial process. A digital serial-to-parallel converter is included in this chip in order to reduce the number of the control interface. The multi-function chip provides several functions: 6-bit phase shifting, 6-bit attenuation, transmit/receive switching, and signal amplification. The fabricated multi-function chip with a relative compact size of 24 $mm^2$(6 mm${\times}$4 mm) exhibits a transmit/receive gain of 24/15 dB and a P1dB of 21 dBm from 8.5 GHz to 10.5 GHz. The RMS errors for the 64 states of the 6-bit phase shift and attenuation were measured to $7^{\circ}$ and 0.3 dB, respectively over the frequency.

Design and Implementation of High Efficiency Transceiver Module for Active Phased Arrays System of IMT-Advanced (IMT-Advanced 능동위상배열 시스템용 고효율 송수신 모듈 설계 및 구현)

  • Lee, Suk-Hui;Jang, Hong-Ju
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.7
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    • pp.26-36
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    • 2014
  • The needs of active phased arrays antenna system is getting more increased for IMT-Advanced system efficiency. The active phased array structure consists of lots of small transceivers and radiation elements to increase system efficiency. The minimized module of high efficiency transceiver is key for system implementation. The power amplifier of transmitter decides efficiency of base-station. In this paper, we design and implement minimized module of high efficiency transceiver for IMT-Advanced active phased array system. The temperature compensation circuit of transceiver reduces gain error and the analog pre-distorter of linearizer reduces implemented size. For minimal size and high efficiency, the implented power amplifier consist of GaN MMIC Doherty structure. The size of implemented module is $40mm{\times}90mm{\times}50mm$ and output power is 47.65 dBm at LTE band 7. The efficiency of power amplifier is 40.7% efficiency and ACLR compensation of linearizer is above 12dB at operating power level, 37dBm. The noise figure of transceiver is under 1.28 dB and amplitude error and phase error on 6 bit control is 0.38 dB and 2.77 degree respectively.

A Design and Fabrication of a Compact Ka Band Transmit/Receive Module Using a Quad-Pack (쿼드팩을 이용한 소형 Ka 대역 송수신(T/R) 모듈의 설계 및 제작)

  • Oh, Hyun-Seok;Yeom, Kyung-Whan;Chong, Min-Kil;Na, Hyung-Gi;Lee, Sang-Joo;Lee, Ki-Won;Nam, Byung-Chang
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.3
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    • pp.389-398
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    • 2011
  • In this paper, the design and fabrication of a transmit/receive(T/R) module for Ka-band phased array radar is presented. A 5bit digital phase shifter and digital attenuator were used in common for both transmitter and receiver considering unique Ka-band characteristic. The circulator was excluded in the T/R module and was placed outside T/R module. The transmitting power per element antenna is designed to be about 1 W and the noise figure is designed to be below 8 dB. The designed T/R module RF part has a compact size of $5\;mm{\times}4\;mm{\times}57\;mm$. In order to implement the T/R module, MMICs used in T/R module was separately assessed before assembly of the designed T/R module. The transmitter of the fabricated T/R module shows about 1 W at 5 dBm unit module input power and the receiver shows a gain of about 20 dB and a noise figure of below 8 dB as expected in the design stage.

Development of an EEG Software for Two-Channel Cerebral Function Monitoring System (2채널 뇌기능 감시 시스템을 위한 뇌파 소프트웨어의 개발)

  • Kim, Dong-Jun;Yu, Seon-Guk;Kim, Seon-Ho
    • Journal of Biomedical Engineering Research
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    • v.20 no.1
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    • pp.81-90
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    • 1999
  • This paper describes an EEG(electroencephalogram) software for two-channel cerebral function monitoring system to detect the cerebral ischemia. In the software, two-channel bipolar analog EEG signals are digitized and from the signals various EEG parameters are extracted and displayed on a monitor in real-time. Digitized EEG signal is transformed by FFT(Fast Fourier transform) and represented as CSA(compressed spectral array) and DSA(density spectral array). Additional 5 parameters, such as alpha ratio, percent delta, spectral edge frequency, total power, and difference in total power, are estimated using the FFT spectra. All of these are effectively merged in a monitor and displayed in real-time. Through animal experiments and clinical trials on men, the software is modified and enhanced. Since the software provides raw EEG, CSA, DSA, simultaneously with additional 5 parameters in a monitor, it is possible to observe patients multilaterally. For easy comparison of patient's status, reference patterns of CSA, DSA can be captured and displayed on top of the monitor. And user can mark events of surgical operation and patient's conditions on the software, this allow him jump to the points of events directly, when reviewing the recorded EEG file afterwards. Other functions, such as forward/backward jump, gain control, file management are equipped and these are operated by simple mouse click. Clinical tests in a university hospital show that the software responds accurately according to the conditions of patients and medical doctors can use the software easily.

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Experiment of KOMPSAT-3/3A Absolute Radiometric Calibration Coefficients Estimation Using FLARE Target (FLARE 타겟을 이용한 다목적위성3호/3A호의 절대복사 검보정 계수 산출)

  • Kyoungwook Jin;Dae-Soon Park
    • Korean Journal of Remote Sensing
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    • v.39 no.6_1
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    • pp.1389-1399
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    • 2023
  • KOMPSAT-3/3A (K3/K3A) absolute radiometric calibration study was conducted based on a Field Line of sight Automated Radiance Exposure (FLARE) system. FLARE is a system, which has been developed by Labsphere, Inc. adopted a SPecular Array Radiometric Calibration (SPARC) concept. The FLARE utilizes a specular mirror target resulting in a simplified radiometric calibration method by minimizing other sources of diffusive radiative energies. Several targeted measurements of K3/3A satellites over a FLARE site were acquired during a field campaign period (July 5-15, 2021). Due to bad weather situations, only two observations of K3 were identified as effective samples and they were employed for the study. Absolute radiometric calibration coefficients were computed using combined information from the FLARE and K3 satellite measurements. Comparison between the two FLARE measurements (taken on 7/7 and 7/13) showed very consistent results (less than 1% difference between them except the NIR channel). When additional data sets of K3/K3A taken on Aug 2021 were also analyzed and compared with gain coefficients from the metadata which are used by current K3/K3A, It showed a large discrepancy. It is assumed that more studies are needed to verify usefulness of the FLARE system for the K3/3A absolute radiometric calibration.

4-Channel 2.5-Gb/s/ch CMOS Optical Receiver Array for Active Optical HDMI Cables (액티브 광케이블용 4-채널 2.5-Gb/s/ch CMOS 광 수신기 어레이)

  • Lee, Jin-Ju;Shin, Ji-Hye;Park, Sung-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.8
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    • pp.22-26
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    • 2012
  • This paper introduces a 2.5-Gb/s optical receiver implemented in a standard 1P4M 0.18um CMOS technology for the applications of active optical HDMI cables. The optical receiver consists of a differential transimpedance amplifier(TIA), a five-stage differential limiting amplifier(LA), and an output buffer. The TIA exploits the inverter input configuration with a resistive feedback for low noise and power consumption. It is cascaded by an additional differential amplifier and a DC-balanced buffer to facilitate the following LA design. The LA consists of five gain cells, an output buffer, and an offset cancellation circuit. The proposed optical receiver demonstrates $91dB{\Omega}$ transimpedance gain, 1.55 GHz bandwidth even with the large photodiode capacitance of 320 fF, 16 pA/sqrt(Hz) average noise current spectral density within the bandwidth (corresponding to the optical sensitivity of -21.6 dBm for $10^{-12}$ BER), and 40 mW power dissipation from a single 1.8-V supply. Test chips occupy the area of $1.35{\times}2.46mm^2$ including pads. The optically measured eye-diagrams confirms wide and clear eye-openings for 2.5-Gb/s operations.

Stacked Pad Area Away Package Modules for a Radio Frequency Transceiver Circuit (RF 송수신 회로의 적층형 PAA 패키지 모듈)

  • Jee, Yong;Nam, Sang-Woo;Hong, Seok-Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.10
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    • pp.687-698
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    • 2001
  • This paper presents a three dimensional stacked pad area away (PAA) package configuration as an implementation method of radio frequency (RF) circuits. 224MHz RF circuits of intelligence traffic system(ITS) were constructed with the stacked PAA RF pakage configuration. In the process of manufacturing the stacked PAA RF pakage, RF circuits were partitioned to subareas following their function and operating frequency. Each area of circuits separated to each subunits. The operating characteristics of RF PAA package module and the electrical properties of each subunits were examined. The measurement of electrical parameters for solder balls which were interconnects for stacked PAA RF packages showed that the parasitic capacitance and inductance were 30fF and 120pH, respectively, which might be negligible in PAA RF packaging system. HP 4396B network/spectrum analyzer revealed that the amplification gain of a receiver and transmitter at 224 MHz was 22dB and 27dB, respectively. The gain was 3dB lower than designed values. The difference was probably generated from fabrication process of the circuits by employing commercial standard

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A Signal Readout System for CNT Sensor Arrays (CNT 센서 어레이를 위한 신호 검출 시스템)

  • Shin, Young-San;Wee, Jae-Kyung;Song, In-Chae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.9
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    • pp.31-39
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    • 2011
  • In this paper, we propose a signal readout system with small area and low power consumption for CNT sensor arrays. The proposed system consists of signal readout circuitry, a digital controller, and UART I/O. The key components of the signal readout circuitry are 64 transimpedance amplifiers (TIA) and SAR-ADC with 11-bit resolution. The TIA adopts an active input current mirror (AICM) for voltage biasing and current amplification of a sensor. The proposed architecture can reduce area and power without sampling rate degradation because the 64 TIAs share a variable gain amplifier (VGA) which needs large area and high power due to resistive feedback. In addition, the SAR-ADC is designed for low power with modified algorithm where the operation of the lower bits can be skipped according to an input voltage level. The operation of ADC is controlled by a digital controller based on UART protocol. The data of ADC can be monitored on a computer terminal. The signal readout circuitry was designed with 0.13${\mu}m$ CMOS technology. It occupies the area of 0.173 $mm^2$ and consumes 77.06${\mu}W$ at the conversion rate of 640 samples/s. According to measurement, the linearity error is under 5.3% in the input sensing current range of 10nA - 10${\mu}A$. The UART I/O and the digital controller were designed with 0.18${\mu}m$ CMOS technology and their area is 0.251 $mm^2$.