• Title/Summary/Keyword: Arithmetic operations.

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Some Properties of Operations on Fuzzy Numbers

  • Hong, Dug-Hun
    • Journal of the Korean Data and Information Science Society
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    • v.13 no.2
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    • pp.209-216
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    • 2002
  • In this paper, we introduce a concept of (H)-property which generalize that of increasing(decreasing) property of binary operation. We also treat some works related to operations on fuzzy numbers and generalize earlier results of Kawaguchi and Da-te(1994).

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A Study on the Utilization of Compatibility Metric in the AHP (AHP의 일치성 척도의 활용에 관한 연구)

  • Yoon, Min-Suk
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2004.05a
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    • pp.181-184
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    • 2004
  • This study proposes two utilization ways of Saaty's compatibility metric to an entire hierarchy: (a) composite mode of all priorities and compatibility indices pertaining to a hierarchy, (b) arithmetic mean of compatibility indices along the hierarchy levels using a reduced elementwise operation of two eigenvectors.

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FUZZY POLYNOMIAL REGRESSION ANALYSIS USING SHAPE PRESERVING IOERATION

  • Hong, Dug-Hun;Do, Hae-Young
    • Journal of applied mathematics & informatics
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    • v.8 no.3
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    • pp.869-880
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    • 2001
  • In this paper, we describe a method for fuzzy polynomial regression analysis for fuzzy input-output data using shape preserving operations based on Tanaka’s approach. Shape preserving operations simplifies the computation of fuzzy arithmetic operations. We derive the solution using general linear program.

Analysis of 74181 Arithmetic Logic Units (74184 Arithmetic Logic Units의 분석)

  • Lee, Jae-Seok;Chung, Tae-Sang
    • Proceedings of the KIEE Conference
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    • 2000.11d
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    • pp.778-780
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    • 2000
  • The 74181 is arithmetic logic units(ALU)/function generator. This circuit performs 16 binary arithmetic operations on two 4-bit words. And a full carry look-ahead scheme is made available in this device. The 74181 can also be utilized as a comparator. This circuit has been also designed to provide 16 possible functions of two Boolean variables without the use of external circuitry. This paper analyzes the function of the logic and the implementation adopted in the design of 74181. The understanding of the logic characteristics of this chip enables us to improve future applications.

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AN APPLICATION OF MARKOV'S EXTENDED INTERVAL ARITHMETIC TO INTERVAL-VALUED SEQUENCE SPACES: A SPECIAL EXAMPLE

  • MEHMET SENGONUL
    • Journal of Applied and Pure Mathematics
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    • v.6 no.3_4
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    • pp.105-117
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    • 2024
  • In the classical sense, it is known that it is impossible to construct a vector space over the entire set of real numbers with the help of simple interval arithmetic. In this article, it has shown that a vector space can be constructed in the classical sense by helping Markov's extended interval arithmetic on the interval valued Cesaro sequence spaces of non-absolute type. As a result of the positive answers, this idea was extended by us with some theorems. Consequently, a new perspective was gained to the construction of new types of sequence spaces by using different algebraic operations on interval-valued sequence spaces.

An Analysis on the Error According to Academic Achievement Level in the Fractional Computation Error of Elementary Sixth Graders (초등학교 6학년 학생이 분수 계산문제에서 보이는 오류의 학업성취수준별 분석)

  • Park, Miyeon;Park, Younghee
    • Journal of Elementary Mathematics Education in Korea
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    • v.21 no.1
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    • pp.23-47
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    • 2017
  • The purpose of this study is to analyze the types of errors that may occur in the four arithmetic operations of the fractions after classified according to the level of academic achievement for sixth-grade elementary school student who Learning of the four arithmetic operations of the fountain has been completed. The study was proceed to get the information how change teaching content and method in accordance with the level of academic achievement by looking at the types of errors that can occur in the four arithmetic operations of the fractions. The test paper for checking the type of errors caused by calculation of fractional was developed and gave it to students to test. And we saw the result by error rate and correct rate of fraction that is displayed in accordance with the level of academic achievement. We investigated the characteristics of the type of error in the calculation of the arithmetic operations of fractional that is displayed in accordance with the level of academic achievement. First, in the addition of the fractions, all levels of students showing the highest error rate in the calculation error. Specially, error rate in the calculation of different denominator was higher than the error rate in the calculation of same denominator Second, in the subtraction of the fractions, the high level of students have the highest rate in the calculation error and middle and low level of students have the highest rate in the conceptual error. Third, in the multiplication of the fractions, the high and middle level of students have the highest rate in the calculation error and low level of students have the highest rate in the a reciprocal error. Fourth, in the division of the fractions, all levels of students have the highest r rate in the calculation error.

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Low-latency Montgomery AB2 Multiplier Using Redundant Representation Over GF(2m)) (GF(2m) 상의 여분 표현을 이용한 낮은 지연시간의 몽고메리 AB2 곱셈기)

  • Kim, Tai Wan;Kim, Kee-Won
    • IEMEK Journal of Embedded Systems and Applications
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    • v.12 no.1
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    • pp.11-18
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    • 2017
  • Finite field arithmetic has been extensively used in error correcting codes and cryptography. Low-complexity and high-speed designs for finite field arithmetic are needed to meet the demands of wider bandwidth, better security and higher portability for personal communication device. In particular, cryptosystems in GF($2^m$) usually require computing exponentiation, division, and multiplicative inverse, which are very costly operations. These operations can be performed by computing modular AB multiplications or modular $AB^2$ multiplications. To compute these time-consuming operations, using $AB^2$ multiplications is more efficient than AB multiplications. Thus, there are needs for an efficient $AB^2$ multiplier architecture. In this paper, we propose a low latency Montgomery $AB^2$ multiplier using redundant representation over GF($2^m$). The proposed $AB^2$ multiplier has less space and time complexities compared to related multipliers. As compared to the corresponding existing structures, the proposed $AB^2$ multiplier saves at least 18% area, 50% time, and 59% area-time (AT) complexity. Accordingly, it is well suited for VLSI implementation and can be easily applied as a basic component for computing complex operations over finite field, such as exponentiation, division, and multiplicative inverse.

Development of an LP integrated environment software under MS-DOS (MS-DOS용 선형계획법 통합환경 소프트웨어의 개발)

  • 설동렬;박찬규;서용원;박순달
    • Korean Management Science Review
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    • v.12 no.1
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    • pp.125-138
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    • 1995
  • This paper is to develop an integrated environment software on MS-DOS for linear programming. For the purpose, First, the linear programming integrated environment software satisfying both the educational purpose and the professional purpose was designed and constructed on MS-DOS. Second, the text editor with big capacity was developed. The arithmetic form analyser was also developed and connected to the test editor so that users can input data in the arithmetic form. As a result, users can learn and perform linear programming in the linear programming integrated environment software.

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Analysis of the 74LS381 ALU and Design of an Equivalent Circuit to the 74L (74LS381 ALU의 분석 및 등가회로의 설계)

  • Lee, Jae-Seok;Chung, Tae-Sang
    • Proceedings of the KIEE Conference
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    • 2001.11c
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    • pp.153-156
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    • 2001
  • This paper analyzes the 74LS381 ALU and designs its equivalent circuit. The 74LS381 ALU is arithmetic logic units(ALUs)/function generators that perform eight binary arithmetic/logic operations on two 4-bit words. However there are only little information to understand and design this circuit. Thus, we not only analyzed it but also designed an equivalent circuit to the 74LS381.

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Simple desing of FIR filters using resistor array (저항열을 이용한 간단한 FIR 필터의 설계방법)

  • 김제우;김진규;조민형
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.9
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    • pp.22-26
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    • 1994
  • In this paper a method of designing FIR filters without digital arithmetic operationsi is persented. The filter coefficients are represented by resistors combined with a differential amplifier. With this method an FIR filter can be simply impemented without refering to complex digital arithmetic operations. Furthermore, in this scheme, no additional D/A converter is needed for D/A conversion. Spectral response response of a pulse shaping filter of 17 coefficients is shown as an illustration.

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