• Journal of KIISE:Software and Applications
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• v.28 no.7
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• pp.478-492
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• 2001

본 논문은 다양한 종류의 분산 인공지능 문제들을 에이전트라는 추상적 단위와 에이전트간의 상호작용을 토대로 해결하는 다중 에이전트 시스템을 개발하는 체계적 접근방법으로서 개발 방법론의 핵심인 아키텍쳐의 개발방법을 제안한다. 목표를 기반으로 문제영역을 이해하고, 여기에서 추출된 에이전트들을 이용하여 시스템을 개발함에 있어 지침이 되는 아키텍쳐 개발공정을 다중 에이전트 시스템의 특성인 조정과 자율성을 고려하여 제안한다. 각 관점마다 적용될 수 있는 아키텍쳐 스타일과 패턴들을 정의하고, 제안한 아키텍쳐를 UML(Unified Modeling Language)을 이용하여 표현하며, 아키텍쳐를 설명하는 ADL(Architecture Description Language)을 이용하여 정형화시킨다. 또한, 이를 지능형 교통시스템의 출발전 교통정보 안내 서브시스템에 적용, 구현함으로써, 제안하는 아키텍쳐를 검증해 보고, 이를 기반으로 소프트웨어를 개발하는 기초를 마련한다.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1149-1152
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• 1998

멀티미디어 데이터를 아날로그 방식보다는 디지털 방식으로 처리하게 되면 여러 면에서 이득을 볼 수 있다. 멀티미디어 데이터를 디지털 방식으로 처리하는 방법 중 범용프로세서에서 멀티미디어 명령어에 의해 처리하게 되면 flexibility를 증가시키며 효율적으로 프로그램할 수 있다. 본 논문에서는 범용 프로세서 안에서 멀티미디어 데이터를 효율적으로 처리할 수 있는 명령어 집합 구조와 이를 수행할 수 있는 프로세서의 구조를 제안하고 이를 HDL(Hardware Description Language)로 동작레벨에서 기술하고 시뮬레이션 하였다. 제안된 멀티미디어 명령어는 특성에 따라 8개의 그룹에 총 55개의 명령어로 구성되며 64비트 데이터 안에서 각각 8비트의 8바이트, 16비트의 4하프워드, 32비트의 2워드의 부워드(subword) 데이터들을 병렬 처리한다. 모델링된 프로세서는 오픈아키텍쳐(Open Architecture)인 SPARC V.9 의 정수연산장치(Integer Unit)에 기반을 두었으며 하바드 구조를 지닌 5단 파이프라인 RISC 형태이다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.11B
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• pp.1939-1947
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• 2000

본 논문에서는 명령어의 효율적인 페치를 위해 분기 타겟 주소 전체를 사용하지 않고 캐쉬 메모리(cache memory) 내의 적은 비트 수로 인덱싱 하여 한 클럭 사이클 안에 최대 4개의 명령어를 다음 파이프라인으로 보내줄 수 있는 방법을 제시한다. 본 프리페치 유닛은 크게 나누어 3개의 영역으로 나눌 수 있는데, 분기에 관련하여 미리 부분적으로 명령어를 디코드 하는 프리디코드(predecode) 블록, 타겟 주소(NTA : Next Target Address) 테이블 영역을 추가시킨 명령어 캐쉬(instruction cache) 블록, 전체 유닛을 제어하고 가상 주소를 관리하는 프리페치(prefetch) 블록으로 나누어진다. 사용된 명령어들은 SPARC(Scalable Processor ARChitecture) V9에 기준 하였고 구현은 Verilog-HDL(Hardwave Description Language)을 사용하여 기능 수준으로 기술되고 검증되었다. 구현된 프리페치 유닛은 명령어 흐름에 분기가 존재하더라도 단일 사이클 안에 4개까지의 명령어들을 정확한 예측 하에 다음 파이프라인으로 보내줄 수 있다. 또한 NTA를 사용한 방법은 같은 수의 레지스터 비트를 사용하였을 때 BTB(Branch Target Buffer)를 사용하는 방법과 비교하여 2배정도 많은 개수의 분기 명령 주소를 저장할 수 있는 장점이 있다.

• Korean Institute of Interior Design Journal
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• v.14 no.2 s.49
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• pp.29-36
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• 2005

There have been a little attempts to draw analogy between architecture and music. There are many objective and subjective factors for this to be true. If, however, the two arts are out of much the same social conditions, they show a degree of conformity in design and general organization. Our study shows the interrelationship between Otto Wagner and Gustav Mahler in Belle Epoque. In order to clarify the interrelationship between architecture and music, this study examines works of Otto Wagner on the basis of the characteristic of Gustav Mahler. This comparison between Otto Wagner and Gustav Mahler follows : in Belle Epoque, they have the same tendency to 1) the disintegration of historicism, 2) the style of description, 3) the reversion, 4) the giganticness, 5) the change of materials and 6) the proportion.

• Journal of the Korean Institute of Landscape Architecture
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• v.25 no.3
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• pp.89-100
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• 1997

The purpose of this paper was to analyze the content of impact prediction in EISS, in order to find the degree of the acuracy of impact prediction . 30 EISS were selected as analysis objects through variance miximization strategy. Content analysis of the selected EISS was performed by 5 analysis items, such as quantification of measurement, range of impact area, time frame of impact, likelihood of impact, and explict characterization of impact significance. The results showed that the accuracy investigated by the 5 items was very low. In conclusion, 5 suggestions were proposed in order to improve the credibility of EIS as a scientific report. The 5 suggestions were : 1) impact prediction should be described by quantitative measurement; 2) In establishing the time frame of the impact and the referent populatioin influenced by the impact, the characteristics of the proposed action should be carefully considerd; 3) the significance of the predicted impact should be quantitatively described; 4) specific description should also be used in the likelihood or the probability of the predicted impact in a real world; 5) equal emphasis should be put on the three environment, including natural and social as well as living environment.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.10
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• pp.11-20
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• 1994

We propose two architectures using two dimensional systolic arrays for the DCT/DST/DHT. One decomposes the N-point DCT/DST/DHT into even-and odd-numbered frequency samples, and then computes them independently at the same time. In addition, the proposed architecture can be used for the IDCT/IDST/IDHT. Anogher is the modified version for the DHT/IDHT. Two proposed architectures generate outputs sequentially using real multiplications and additions. As compared to the conventional methods the proposed systolic arrays exhibit many advantages in terms of simplicity of the processing element (PE), latency, and throughput. Teh simulation results using VHDL, international standard language for hardware description, show the effectiveness of the proposed architecture.

• Journal of Ocean Engineering and Technology
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• v.23 no.1
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• pp.60-66
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• 2009

This study presents an experimental investigation of the shallow water impact of a box type structure. The analysis was done based on the video images captured by a high speed camera, the flow field obtained by PIV (Particle Image Velocimetry), and pressure measurements in the divided region. The video images showed quite good agreement with the description given by Korobkin. The PIV measurements of the velocity field provided a clear view of the flow pattern for all three stages. The pressure was measured at the bottom of the tank with strain gauge type pressure gauges. The pressure measurements showed the characteristics of divided regions.

• Proceedings of the Korean Information Science Society Conference
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• 2010.06d
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• pp.190-195
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• 2010

Vehicular ad hoc networks (VANETs) have a number of interesting applications to preserve road safety, notify users about changed road/traffic condition, handling post accident hazards and moreover service oriented applications to make the travel convenient to the drivers. Use of common information format for diverse applications enables the application developers to easily design flexible information dissemination system for new applications or add new features to existing application. This paper introduces a common information format for various applications in VANETs. The main goal of the paper is to design generalized distributed architectures for vehicular networks, which considers diverse application development scenarios and uses common information format. The proposed architectures enable the application developers to flexibly disseminate information to affected or interested user. In this paper, we have given a detail description of each component of the architectures and how they communicate with each other. In future, we will implement the proposed architecture using suitable simulator.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.11a
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• pp.209-210
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• 2011

In this paper, an area-efficient architecture of LDPC Decoder is proposed for DVB (Digital Video Broadcasting) 2.0 systems. The proposed LDPC Decoder was designed in hardware description language (HDL) and implemented with Xilinx Virtex-5 FPGA. With the proposed architecture, the number of slices for the decoder is 56122 and the number of block RAM is 135.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 2002.05a
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• pp.163-170
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• 2002

The High Level Architecture(HLA) for modeling and simulation was developed as means of facilitating interoperability among simulations and promoting reuse of simulations and their components. The purpose of this paper is to provide a summary of the latest release of the HLA concept, supporting utilities and develop the prototyped Transportation Movement Management(TMM) federation. To obtain this goal, the Federation Development and Execution Process(FEDEP) is being applied to development of TMM federation will consist of three federates. This paper outlines the rationale of our approach, describes the application of the FEDEP in the development of the federation, and provides the current status of the federation development. The resulting federation shows complete interoperability among simulation components in the TMM federation and satisfactory simulation outputs. We present a description and process of the federation and the lessons learned with the process utilization for federation development and execution. Furthermore, the issues in establishing a HLA based federation across multiple legacy simulations are discussed.