• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.3
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• pp.190-194
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• 2003

Dielectric thin films of (P $b_{0.72}$,L $a_{0.28}$) $Ti_{0.93}$ $O_3$ (PLT(28)) have been deposited on Pt(111)/Ti/ $SiO_2$/Si(100) substrates in-situ by pulsed laser deposition using different annealing and deposition Processes. We have investigated the effect of hydrogen annealing on the ferroelectric properties of PLT thin films and found that the annealing process causes the diffusion of hydrogen into the ferroelectric film resulting in the destruction of polarization. We have tried to form the film by a two-step deposition process In order to improve electrical property. Two-step process to grow PLT films was adopted and verified to be useful to enlarge the grain size of the film and to reduce the leakage current characteristics. Structural properties and electrical properties including dielectric constant, ferroelectric characteristics, and leakage current of PLT thin films were shown to be strongly influenced by grain size. The film deposited by using two-step Process including pre-annealing treatment has a strongly(111) orientation. However, the films deposited by using single -step process with hydrogen annealing process show the smallest grain size. The film deposited by using two-step process including pre-annealing treatment shows the leakage current density of below 10$^{-7}$ A/c $m^2$ for the field of smaller than 100 kV/cm. However, the films deposited by using single-step process with hydrogen annealing process and pre-annealing process show worse leakage current density than the film deposited by using two-step process including pre-annealing treatment.tment.

• Korean Journal of Materials Research
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• v.12 no.10
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• pp.820-824
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• 2002

It is of importance to know that the bonding strength and interfacial stress of SOI wafer pairs to meet with mechanical and thermal stresses during process. We fabricated Si/2000$\AA$-SiO$_2$ ∥ 2000$\AA$-SiO$_2$/Si SOI wafer pairs with electric furnace annealing, rapid thermal annealing (RTA), and fast linear annealing (FLA), respectively, by varying the annealing temperatures at a given annealing process. Bonding strength and interfacial stress were measured by a razor blade crack opening method and a laser curvature characterization method, respectively. All the annealing process induced the tensile thermal stresses. Electrical furnace annealing achieved the maximum bonding strength at $1000^{\circ}C$-2 hr anneal, while it produced constant thermal tensile stress by $1000^{\circ}C$. RTA showed very small bonding strength due to premating failure during annealing. FLA showed enough bonding strength at $500^{\circ}C$, however large thermal tensile stress were induced. We confirmed that premated wafer pairs should have appropriate compressive interfacial stress to compensate the thermal tensile stress during a given annealing process.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.251.1-251.1
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• 2013

Combination of oxidative vacuum annealing and oxygen plasma treatment can serve as a simple and efficient method of line-width modification of imprinted nanopatterns. Since the vacuum annealing and oxygen plasma could lead mass loss of polymeric materials, either one of the process can yield a narrowed patterns. However, the vacuum annealing process usually demands quite high temperatures (${\geq}300^{\circ}C$) and extended annealing time to get appreciable line-width reduction. Although the plasma treatment may be considered as an effective low temperature rapid process for the line-width reduction, it is also suffering for the lowered controllability on application to very fine patterns. We have found that the vacuum annealing temperature can be lowered by introducing the oxygen in the vacuum process and that the combination of oxygen plasma treatment with the vacuum annealing could yield the best result in the line-with reduction of the imprinted polymeric nanopatterns. Well-defined line width reduction by more than 50% was successfully demonstrated at relatively low temperatures. Furthermore, it was verified that this process was applicable to the nanopatterns of different shapes and materials.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.346.2-346.2
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• 2016

The rear side contact recombination in the crystalline silicon solar cell could be reduced by back surface field. We formed polycrystalline silicon as a back surface field through crystallization of amorphous silicon. A thin silicon oxide applied to the passivation layer. We used quasi-steady-state photoconductance measurement to analyze electrical properties with various annealing condition. And, blister formed on surface of wafer during the annealing process. We observed the blister after varied annealing process with wafer of various surface. Shape and density of blister is influenced by various annealing temperature and process time. As the annealing temperature became higher, the average diameter of blister is decreased and total number of blister is increased. The sample with the $600^{\circ}C$ annealing temperature and 1 min annealing time exhibited the highest implied open circuit voltage and lifetime. We predicted that the various shape and density of blister affects the lifetime and implied open circuit voltage.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.395-397
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• 2002

Dielectric thin films of Pb$\_$0.72/La$\_$0.28/Ti$\_$0.93/O$_3$(PLT(28)) have been deposited on Pt(111)/Ti/SiO$_2$/Si(100) substrates in-situ by pulsed laser deposition using different annealing and deposition processes. We have investigated the effect of hydrogen annealing on the ferroelectric properties of PLT thin films and found that the annealing process causes the diffusion of hydrogen into the ferroelectric film resulting in the destruction of polarization. Two-step process to grow PLT films was adopted and verified to be useful to enlarge the grain size of the film. Structural properties including dielectric constant, and ferroelectric characteristics of PLT thin films were shown to be strongly influenced by grain size. The film deposited by using two-step process including pre-annealing treatment has a strong (111) orientation. However, the films deposited by using single-step process with hydrogen annealing process shows the smallest grain size.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 1999.10a
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• pp.530-535
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• 1999

In recently, annealing process of cold rolled sheet tend to change to continuous annealing process for improving quality, saving yield. In the meantime as demand for various kind and small lot of products has been increasing, batch annealing has been appreciated for its small restriction for the operation. So, we tested on the effect for the proper heating temperatures, heating time of cycle, cooling time and total cycle time in this annealing process of hi tensile strength steel for automobile. As a result of several investigation. we confirmed for the following characteristics; In this process, we knew that 68$0^{\circ}C$ is suitable for this heating temp. cycle heating time of 38 Hr, cooling time of 31 Hr and total cycle time of 70 Hr. Still more, we could know that it is proper for cold rolling before annealing to be managed by 7 pass because of the act on high pressure.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.5
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• pp.365-371
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• 2003

We prepared silicon on insulator(SOI) wafer pairs of Si/1800${\AA}$ -SiO$_2$ ∥ 1800${\AA}$ -SiO$_2$/Si using water direct bonding method. Wafer pairs bonded at room-temperature were annealed by a normal furnace system or a fast linear annealing(FLA) equipment, and the micro-structure of bonding interfaces for each annealing method was investigated. Upper wafer of bonded pairs was polished to be 50 $\mu\textrm{m}$ by chemical mechanical polishing(CMP) process to confirm the real application. Defects and bonding area of bonded water pairs were observed by optical images. Electrical and mechanical properties were characterized by measuring leakage current for sweeping to 120 V, and by observing the change of wafer curvature with annealing process, respectively. FLA process was superior to normal furnace process in aspects of bonding area, I-V property, and stress generation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.10
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• pp.859-864
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• 2003

We prepared SOI(silicon-on-insulator) wafer pairs of Si II SiO$_2$/Si$_3$N$_4$ II Si using wafer direct bonding with an electric furnace annealing(EFA), a fast linear annealing(FLA), and a rapid thermal annealing(RTA), respectively, by varying the annealing temperatures at a given annealing process. We measured the bonding area and the bonding strength with processes. EFA and FLA showed almost identical bonding area and theoretical bonding strength at the elevated temperature. RTA was not bonded at all due to warpage, We report that FLA process was superior to other annealing processes in aspects of surface temperature, annealing time, and bonding strength.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1424-1425
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• 2006

A four-step rapid thermal annealing (RTA) process is proposed in order to improve the throughput and stabilize the process, compared to the six-step RTA process. Effects of annealing on the properties of a structure mode of CMOS process in both cases were investigated. The implanted dopant(As, $BF_2$ and Ti/TiN) movement in silicon during different rapid thermal annealing conditions was studied using secondary ion mass spectroscopy (SIMS) technique. These results show that the four-step RTA process significantly improves time effect and throughput (15%) by the condition of ramping up compared to the six-step RTA process.

• Journal of the Korean Vacuum Society
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• v.4 no.S2
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• pp.69-74
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• 1995

The effects of TCA incorporation during annealing process on the SIMOX quality is studied. Silicon wafers are implanted with heavy dose of oxygen ions, and are annealed at $1300^{\circ}C$ for 4 hours. The annealing process is splitted into three conditions due to some differences of low temperature preliminary annealing step which are without pre-annealing step. The specimens are analyzed by several methods, such as AES, XTEM, and TRXFA. TCA incorporation during pre-annealing step is effective in dislocation density reduction and heavy metal content reduction.