• Proceedings of the KSME Conference
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• 2003.04a
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• pp.1407-1411
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• 2003

Due to the heat confinement in the shallow region of the target for a short time scale, pulsed laser annealing has received increasing interest for the fabrication of poly-Si thin film transistors(TFTs) on glass as a low cost substrate in the flat panel displays. The formation and growth mechanisms of poly silicon(poly-Si) grains in thin films are investigated using an excimer laser crystallization system. To understand the crystallization mechanism, the grain formations are observed by FESEM analysis. The optical reflectance and transmittance during the crystallization process are measured using HeNe laser optics. A two-step ELC(Excimer Laser Crystallization) process is applied to enhance the grain formation uniformity.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.11a
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• pp.5-9
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• 1996

As optical massmemories, (Se, S)-based chalcogenide amorphous films are used for a holographic supermicrofiche by using the refractive-index change. In 1000$\AA$thick-As$_{40}$ Ge$_{10}$Se$_{100-x}$S$_{x}$(x=0.25, 35at.%), the amount of refractive index change $\Delta$n reaches 0.01~0.53 at 6328, 7800$\AA$ by exposing for 15minutes plue-pass filtered mercury lamp(~4300$\AA$) and annealing 20$0^{\circ}C$. And in initially annealed As$_{40}$ Ge$_{10}$Se$_{15}$ S$_{35}$, photodarkening(PD) and thermalbleaching(TB) was founded.ded.B) was founded.d.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.605-608
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• 2006

The recent application of wide band gap oxide semiconductors to transparent thin film transistors (TTFTs) is making a fast and growing (r)evolution on the contemporary solid-state electronics. In this paper we present some of the recent results we have obtained using wide band gap oxide semiconductors, like indium zinc oxide, produced by rf sputtering at room temperature. The devices work in the enhancement mode and exhibit excellent saturation drain currents. On-off ratios above $10^6$ are achieved. The optical transmittance data in the visible range reveals average transmittance higher than 80 %, including the glass substrate. Channel mobilities are also quite respectable, with some devices presenting values around $25\;cm^2/Vs$, even without any annealing or other post deposition improvement processes. The high performances presented by these TTFTs associated to a high electron mobility, at least two orders of magnitude higher than that of conventional amorphous silicon TFTs and a low threshold voltage, opens new doors for applications in flexible, wearable, disposable portable electronics as well as battery-powered applications.

• Transactions on Electrical and Electronic Materials
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• v.18 no.3
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• pp.141-143
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• 2017

Novel structured thin film transistors (TFTs) of amorphous silicon zinc tin oxide (a-SZTO) were designed and fabricated with a thin metal layer between the source and drain electrodes. A SZTO channel was annealed at $500^{\circ}C$. A Ti/Au electrode was used on the SZTO channel. Metals are deposited between the source and drain in this novel structured TFTs. The mobility of the was improved from $14.77cm^2/Vs$ to $35.59cm^2/Vs$ simply by adopting the novel structure without changing any other processing parameters, such as annealing condition, sputtering power or processing pressure. In addition, stability was improved under the positive bias thermal stress and negative bias thermal stress applied to the novel structured TFTs. Finally, this novel structured TFT was observed to be less affected by back-channel effect.

• Journal of the Korean Ceramic Society
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• v.30 no.4
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• pp.332-338
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• 1993

TiN/Ti is the best buffer layer between PZT thin film and si substrate among the Ti, TiN, ZrN, TiN/Ti, ZrN/Ti. The amorphous PZT films deposited on TiN/Ti buffer layer directly transform into perovskite phase when rapid thermal annealed for 30sec above 55$0^{\circ}C$. As Rapid Thermal Annealing(RTA) temperature increased, the remanent polarization(Pr) and dielectric constant($\varepsilon$r) increased and then showed Pr=21 $\varepsilon$r=593 when rapid thermal annealed 80$0^{\circ}C$ for 30sec. On the contrary the leakage current increased with increasing RTA temperature due to the formation of void made by Pb evaporationand grain cohesion.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.244.2-244.2
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• 2016

폴리 실리콘 박막은 저온 안정성, 산화 안정성, 가스 투과성 및 전기재료로서의 우수한 물성 때문에 산업에서 계속적으로 넓게 쓰이고 있다. 특히 최근 높은 색 재현율과 고화질로 각광을 받고 있는 능동형 유기발광 다이오드 (AMOLED)를 위한 Thin Film Transistor (TFT)는 신뢰성 및 우수한 특성이 요구되기 때문에 반드시 폴리실리콘 TFT가 적용되어야 한다. 이러한 이유 때문에 아모포스 실리콘을 폴리실리콘으로 결정화 시키는 방법들이 많이 연구 되어져왔다. 이 연구에서는 아모포스 실리콘 박막을 고품질의 폴리실리콘 박막으로 제조하기 위해, 기판에 positive DC 전압을 펄스 형태로 인가함으로써, 기판에 입사되는 전자를 이용한 열처리 방법을 사용하였다. 열처리 온도는 기판에 들어오는 current값을 조절함으로써 제어할 수 있었다. 열처리를 위해 사용 된 수소화 된 아모포스 실리콘은 Low Pressure Chemical Vapor Deposition (LPCVD)장비로 530도에서 증착 되었으며, 이러한 아모포스 실리콘 박막은 공정시간 60 s 이내에 샘플 표면온도가 600도 이상으로 증가함으로써 균일한 폴리실리콘 막으로 제조 되었다.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.907-909
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• 2009

Low voltage operated top gated polymer transistors were fabricated with a high permittivity polymer, P(VDF-TrFE) and F8T2 as a gate dielectric and semiconducting layer, respectively. The operating voltage of transistors was effectively reduced under -10 V and typical threshold voltages were as low as -1 ~ -4 V with the reasonable charge carrier mobility of $10^{-3}cm^2$/Vs for the amorphous polymer. The large hysteresis in transfer curve was improved effectively by annealing at low temperature.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.239-240
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• 2008

As semiconductor devices are scaled down for better performance and more functionality, the Cu-based interconnects suffer from the increase of the resistivity of the Cu wires. The resistivity increase, which is attributed to the electron scattering from grain boundaries and interfaces, needs to be addressed in order to further scale down semiconductor devices [1]. The increase in the resistivity of the interconnect can be alleviated by increasing the grain size of electroplating (EP)-Cu or by modifying the Cu surface [1]. Another possible solution is to maximize the portion of the EP-Cu volume in the vias or damascene structures with the conformal diffusion barrier and seed layer by optimizing their deposition processes during Cu interconnect fabrication, which are currently ionized physical vapor deposition (IPVD)-based Ta/TaN bilayer and IPVD-Cu, respectively. The use of in-situ etching, during IPVD of the barrier or the seed layer, has been effective in enlarging the trench volume where the Cu is filled, resulting in improved reliability and performance of the Cu-based interconnect. However, the application of IPVD technology is expected to be limited eventually because of poor sidewall step coverage and the narrow top part of the damascene structures. Recently, Ru has been suggested as a diffusion barrier that is compatible with the direct plating of Cu [2-3]. A single-layer diffusion barrier for the direct plating of Cu is desirable to optimize the resistance of the Cu interconnects because it eliminates the Cu-seed layer. However, previous studies have shown that the Ru by itself is not a suitable diffusion barrier for Cu metallization [4-6]. Thus, the diffusion barrier performance of the Ru film should be improved in order for it to be successfully incorporated as a seed layer/barrier layer for the direct plating of Cu. The improvement of its barrier performance, by modifying the Ru microstructure from columnar to amorphous (by incorporating the N into Ru during PVD), has been previously reported [7]. Another approach for improving the barrier performance of the Ru film is to use Ru as a just seed layer and combine it with superior materials to function as a diffusion barrier against the Cu. A RulTaN bilayer prepared by PVD has recently been suggested as a seed layer/diffusion barrier for Cu. This bilayer was stable between the Cu and Si after annealing at $700^{\circ}C$ for I min [8]. Although these reports dealt with the possible applications of Ru for Cu metallization, cases where the Ru film was prepared by atomic layer deposition (ALD) have not been identified. These are important because of ALD's excellent conformality. In this study, a bilayer diffusion barrier of Ru/TaCN prepared by ALD was investigated. As the addition of the third element into the transition metal nitride disrupts the crystal lattice and leads to the formation of a stable ternary amorphous material, as indicated by Nicolet [9], ALD-TaCN is expected to improve the diffusion barrier performance of the ALD-Ru against Cu. Ru was deposited by a sequential supply of bis(ethylcyclopentadienyl)ruthenium [Ru$(EtCp)_2$] and $NH_3$plasma and TaCN by a sequential supply of $(NEt_2)_3Ta=Nbu^t$ (tert-butylimido-trisdiethylamido-tantalum, TBTDET) and $H_2$ plasma. Sheet resistance measurements, X-ray diffractometry (XRD), and Auger electron spectroscopy (AES) analysis showed that the bilayer diffusion barriers of ALD-Ru (12 nm)/ALD-TaCN (2 nm) and ALD-Ru (4nm)/ALD-TaCN (2 nm) prevented the Cu diffusion up to annealing temperatures of 600 and $550^{\circ}C$ for 30 min, respectively. This is found to be due to the excellent diffusion barrier performance of the ALD-TaCN film against the Cu, due to it having an amorphous structure. A 5-nm-thick ALD-TaCN film was even stable up to annealing at $650^{\circ}C$ between Cu and Si. Transmission electron microscopy (TEM) investigation combined with energy dispersive spectroscopy (EDS) analysis revealed that the ALD-Ru/ALD-TaCN diffusion barrier failed by the Cu diffusion through the bilayer into the Si substrate. This is due to the ALD-TaCN interlayer preventing the interfacial reaction between the Ru and Si.

• Korean Journal of Materials Research
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• v.20 no.6
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• pp.289-293
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• 2010

Silicon quantum dots (Si QDs) in a superlattice for high efficiency tandem solar cells were fabricated by magnetron rf sputtering and their characteristics were investigated. SiC/$Si_{1-x}C_x$ superlattices were deposited by co-sputtering of Si and C targets and annealed at $1000^{\circ}C$ for 20 minutes in a nitrogen atmosphere. The Si QDs in Si-rich layers were verified by transmission electron microscopy (TEM) and X-ray diffraction. The size of the QDs was observed to be 3-6 nm through high resolution TEM. Some crystal Si and -SiC peaks were clearly observed in the grazing incident X-ray diffractogram. Raman spectroscopy in the annealed sample showed a sharp peak at $516\;cm^{-1}$ which is an indication of Si QDs. Based on the Raman shift the size of the QD was estimated to be 4-6 nm. The volume fraction of Si crystals was calculated to be about 33%. The change of the FT-IR absorption spectrum from a Gaussian shape to a Lorentzian shape also confirmed the phase transition from an amorphous phase before annealing to a crystalline phase after annealing. The optical absorption coefficient also decreased, but the optical band gap increased from 1.5 eV to 2.1 eV after annealing. Therefore, it is expected that the optical energy gap of the QDs can be controlled with growth and annealing conditions.

• Journal of the Korean Magnetics Society
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• v.1 no.1
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• pp.12-16
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• 1991

The effect of annealing on the magnetic properties and the microstructures of the amorphous $Fe_{76-x}Cu_1Mo_xSi_{14}B_9$(x=2,3) alloys were investigated. When annealed at 500${^{\circ}C}$ for 1hr, $8{\sim}9{\times}10^3$ of the effective permeability and 3~4 A/m of the coercive force were achieved upon crystallization to $\alpha$-Fe phase. And the average diameter of the $\alpha$-Fe grains was about 20nm. For the nanovrystalline ferromagnets. the fine grain size is the important requirement to obtain a good soft magnetic property. In this work, in order to get the finer grain size of $\alpha$-Fe phase, two-step annealing treatment was given. That is, following the low-temperature at $400{^{\circ}C}$ for 1~3hr, the high-temperature annealing at $500{^{\circ}C}$ for 1hr was carried out. As the low-temperature annealing time increased, the effective permeability increased to $1.2{\sim}1.7{\times}10^4$ and the coercive force decreased to about 2 A/m. And the grain size was observed to be smaller than 10nm. The increased permeability and the decreased coercive force were attributed to the reduced average crystalline anisotropy by the refinement of $\alpha$-Fe(Si) grains.