• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.3
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• pp.135-139
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• 1996

It is difficult to fabricate precise resistors for the analog integrated circuits using MOS technology. Until now polysilicon resistors were used at the analog integrated circuits, but some deviations of resistance and sensitive variation processes still cause their misactions. In order to improve these misactions, we suggest a CMOS resistor cell which provides precise resistance and excellant linearity. Also we designed the second order active low pass filter using the CMOS resistor cells and verified their superior performances compared to the actual resistors.

• Journal of Information Display
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• v.5 no.4
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• pp.1-6
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• 2004

In this paper, we investigate on the characteristics of poly-Si TFTs reuired for the implementation of analog circuits to be integrated with System-on-Glass (SoG). Matching requirements in terms of resistor values, threshold voltage and mobility of poly-Si TFTs are derived as a function of the resolution of display system. Effective mobility of poly-Si TFTs required for the realization of source driver is analyzed for various panel sizes.

• The Transactions of the Korea Information Processing Society
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• v.4 no.8
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• pp.2120-2132
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• 1997

A layout automation system for analog integrated circuits is proposed. The implemented system performs full-custom analog layout under the analog layout constraints. In order to overcome the demerits of conventional analog layout systems, parameterized module library is proposed. The system can support complex analog layout modules, resulting in a maximum expandability of the system. Moreover, modified dynamic multi-path algorithm is developed by enhancing the conventional Dijkstra algorithm. Several benchmark circuits such as comparator, op amp, and filter was tested by the system. Layout results compared to OPASYN show well-merging layout and interdigitized layout module.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.81-84
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• 2004

Required characteristics of poly-Si TFT's are investigated for the implementation of analog circuits to be integrated on System-on-Glass (SoG). Matching requirements on resistor values, threshold voltage and mobility of poly-Si TFT's are derived as a function of the resolution of display system. Effective mobility of poly-Si TFT's required for the realization of source driver is analyzed for various panel sizes.

• Proceedings of the IEEK Conference
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• 2000.11c
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• pp.149-152
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• 2000

We propose simple analog MOS circuits producing the one-dimensional compact motion-sensing circuits. In the proposed circuit, the optical flow is computed by a number of local motion sensors which are based on biological motion detectors. Mimicking the structure of biological motion detectors made the circuit structure quite simple, compared with conventional velocity sensing circuits. Extensive simulation results by a simulation program of integrated circuit emphasis (SPICE) indicated that the proposed circuits could compute local velocities of a moving light spot and showed direction selectivity for the moving spot

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.15-22
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• 2005

Using the existing analog circuits, required resistor matching and Poly-Si TFT characteristics are investigated for the implementation of analog circuits to be integrated on System-on-Glass. Matching requirements on resistor values, threshold voltage and mobility of poly-Si TFT are derived as a function of the resolution of display system. Also, the effective mobility of poly-Si TFT required for the realization of source driver is analyzed for various panel sizes.

• Journal of Multimedia Information System
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• v.8 no.2
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• pp.143-146
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• 2021

This work presents an automated transistor biasing scheme for analog integrated circuits. In order to effectively bias the transistor at a desired operating point, the proposed method uses a linearized transistor circuit model along with the curve fitted expressions obtained from the pre-simulated I-V characteristics of the actual transistor. As a result, the transistor size that leads to the desired operating point can be easily determined without heavily relying on the circuit simulator, which will lead to significant design time reduction. Furthermore, the proposed method is applied to an actual amplifier circuit where the design time based on the proposed biasing method showed 10× faster than the conventional design approach using the circuit simulator.

• Journal of Electrical Engineering and Technology
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• v.13 no.6
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• pp.2485-2492
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• 2018

The rapid development of large-scale integrated circuits has brought great challenges to the circuit testing and diagnosis, and due to the lack of exact fault models, inaccurate analog components tolerance, and some nonlinear factors, the analog circuit fault diagnosis is still regarded as an extremely difficult problem. To cope with the problem that it's difficult to extract fault features effectively from masses of original data of the nonlinear continuous analog circuit output signal, a novel approach of feature extraction and dimension reduction for analog circuit fault diagnosis based on wavelet packet decomposition, local linear embedding algorithm, and clone selection algorithm (WPD-LLE-CSA) is proposed. The proposed method can identify faulty components in complicated analog circuits with a high accuracy above 99%. Compared with the existing feature extraction methods, the proposed method can significantly reduce the quantity of features with less time spent under the premise of maintaining a high level of diagnosing rate, and also the ratio of dimensionality reduction was discussed. Several groups of experiments are conducted to demonstrate the efficiency of the proposed method.

• Journal of Information Display
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• v.2 no.2
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• pp.1-6
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• 2001

A $1"{\times}l"$, $512{\times}512$ poly-Si TFT-LCD with a new integrated 8-bit parallel-serial digital data driver was proposed and designed. For high resolution, the proposed parallel-serial digital driver used serial video data rather than parallel ones. Thus, digital circuits for driving one column line could be integrated within very small width. The parallel-serial digital data driver comprised of shift registers, latches, and serial digital-to-analog converters (DAC's). We designed a $1"{\times}l"$, $512{\times}512$ poly-Si TFT-LCD with integrated 8-bit parallel-serial digital data drivers by a circuit simulator which has physical-based analytical model of poly-Si TFT's. The fabricated shift register well operated at 2 MHz and $V_{DD}$=10V and the fabricated poly-Si TFT serial DAC's, which converts serial digital data to an analog signal, could convert one bit within $2.8{\mu}s$. The driver circuits for one data line occupied $8100{\times}50{\mu}m^2$ with $4{\mu}m$ design rule.

• Journal of information and communication convergence engineering
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• v.14 no.4
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• pp.268-271
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• 2016

An efficient inductive switching noise suppression technique for mixed-signal integrated circuits (ICs) using standard CMOS digital technology is proposed. The proposed design technique uses a parallel RC circuit, which provides a damping path for the switching noise. The proposed design technique is used for designing a mixed-signal circuit composed of a ring oscillator, a digital output buffer, and an analog noise sensor node for $0.13-{\mu}m$ CMOS digital IC technology. Simulation results show a 47% reduction in the on-chip inductive switching noise coupling from the noisy digital to the analog blocks in the same substrate without an additional propagation delay. The increased power consumption due to the damping resistor is only 67% of that of the conventional source damping technique. This design can be widely used for any kind of analog and high frequency digital mixed-signal circuits in CMOS technology