• Economic and Environmental Geology
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• v.5 no.2
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• pp.105-112
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• 1972

• ETRI Journal
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• v.35 no.1
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• pp.109-119
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• 2013

Static testing of analog-to-digital (A/D) and digital-to-analog (D/A) converters becomes more difficult when they are embedded in a system on chip. Built-in self-test (BIST) reduces the need for external support for testing. This paper proposes a new static BIST structure for testing both A/D and D/A converters. By sharing test circuitry, the proposed BIST reduces the hardware overhead. Furthermore, test time can also be reduced using the simultaneous test strategy of the proposed BIST. The proposed method can be applied in various A/D and D/A converter resolutions and analog signal swing ranges. Simulation results are presented to validate the proposed method by showing how linearity errors are detected in different situations.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.633-634
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• 2006

A new specification-based analog and mixed-signal test technique using high performance current sensors is proposed. The proposed technique using current sensors built in external ATE has little hardware overhead in circuit under test and high testability without time consuming operation of test point placement algorithm.

• Journal of The Korean Association For Science Education
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• v.19 no.1
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• pp.107-116
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• 1999

The effects of clarified mapping strategy and placement of analog on middle school students' conceptual understanding were investigated. According to the usage of clarified mapping strategy and the sequence in presenting analogy, four types of learning materials were developed and pilot tested. Prior to the treatment, the field dependence-independence test was administered and a previous achievement test scores were obtained. The scores were used as blocking variables. The learning materials were read by randomly assigned middle school students (N=111), and the conceptions test was administered immediately and four weeks later. In the recall problems of immediate and retention test, there were no significant differences. In the application problems of immediate and retention test, however, the students learned with clarified mapping strategy scored significantly higher than those with analog-only. Field-independent students learned with clarified mapping strategy scored significantly higher in the immediate application than those with analog-only, and higher-level students learned with clarified mapping strategy scored significantly higher in the retention application than those with analog-only. In the immediate application, higher-level students learned analog first with clarified mapping strategy scored significantly higher in the immediate application than those learned target concept first with clarified mapping strategy. However, lower-level students learned target concept first with clarified mapping strategy scored significantly higher than those learned analog first with clarified mapping strategy.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.1
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• pp.33-41
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• 2019

We propose an embedded solution to design a high-speed and high-accuracy 16bit analog-digital signal processing interface for the control systems using various external analog signals. Choosing TMS320F28377D micro controller unit (MCU) featuring high-performance processing in the 32-bit floating point operation, low power consumption, and various I/O device supports, we design and build the proposed system that supports both 16-bit analog-digital converter (ADC) interface and high precision digital-analog converter (DAC) interface. The ADC receives voltage-level differential signals from fully differential amplifiers, and the DAC communicates with MCU through 50 MHz bandwidth high-fast serial peripheral interface (SPI). We port the boot loader and device drivers to the implemented board, and construct the firmware development environment for the application programming. The performance of the entire implemented system is demonstrated by analog-digital signal processing tests, and is verified by comparing the test results with those of existing similar systems.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.655-656
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• 2006

A parallel analog Viterbi decoder which decodes PR (1,2,2,1) signal of optical disc has been fabricated into chip. The proposed parallel analog Viterbi decoder implements the functions of the conventional digital Viterbi decoder utilizing the analog parallel processing circuits. In this paper, the analog parallel Viterbi decoding technology is applied for the PR signal. The benefit of analog processing is the low power consumption and the less silicon consumption. The test results of the fabricated chip are reported in this paper.

• Journal of Power System Engineering
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• v.9 no.4
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• pp.155-161
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• 2005

Governors control the revolution speed of heat engines such as diesel engines, steam turbines and gas turbines. Precise and prompt tests for the control performances of governors are essential both in governors' manufacturing processes and in governors' maintenance processes. In the conventional governor test systems controlled by analog type electronic controllers, the incorporation of heat engine's dynamics to the test system have been considered very difficult to realize. This study suggests a new governor test system controlled by a digital controller using a personal computer. The application of the digital controller to the test system instead of the analog type electronic controller have brought about the following advancements; (1) heat engine's dynamics could be implemented easily in the test system, (2) automatic test data acquisition both in steady state and in transient state enables us to save test time and to enhance the reliability of the tests.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.909-912
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• 1999

This paper describes realized APC and pre-equalizer circuit, and their operation principle and test results. In analog optical transmitter, constant lasing power control, free of signal clipping and linearity are important considerations. We examined pre-equalizer and APC(Automatic Power Control) circuit to improve the analog optical transmitter performance.

• Journal of Electrical Engineering and Technology
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• v.9 no.6
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• pp.2065-2069
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• 2014

The DAC-7512E is a 12-bit digital to analog converter that is low power and a single package with internal buffers. The DAC-7512E takes up minimal PCB area for applications of space power electronics design. The spacecraft mass is a crucial point considering spacecraft launch into space. Therefore, we have performed a TID test for the DAC-7512E 12-bit serial input digital to analog converter to reduce the spacecraft mass by using a low-level Gamma-ray irradiator with $Co^{60}$ gamma-ray sources. The irradiation with $Co^{60}$ gamma-rays was carried out at doses from 0 krad to 100 krad to check the error status of the device in terms of current, voltage and bit error status during conversion. The DAC-7512E 12-bit serial digital to analog converter should work properly from 0 krad to 30 krad without any error.

• ETRI Journal
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• v.31 no.2
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• pp.209-214
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• 2009

In this paper, we propose a novel test methodology for the detection of catastrophic and parametric faults present in analog very large scale integration circuits. An automatic test pattern generation algorithm is proposed to generate piece-wise linear (PWL) stimulus using wavelets and a genetic algorithm. The PWL stimulus generated by the test algorithm is used as a test stimulus to the circuit under test. Faults are injected to the circuit under test and the wavelet coefficients obtained from the output response of the circuit. These coefficients are used to train the neural network for fault detection. The proposed method is validated with two IEEE benchmark circuits, namely, an operational amplifier and a state variable filter. This method gives 100% fault coverage for both catastrophic and parametric faults in these circuits.