• 제목/요약/키워드: Amorphous silicon

검색결과 793건 처리시간 0.032초

Evaluation of 1/f Noise Characteristics for Si-Based Infrared Detection Materials

  • Ryu, Ho-Jun;Kwon, Se-In;Cheon, Sang-Hoon;Cho, Seong-Mok;Yang, Woo-Seok;Choi, Chang-Auck
    • ETRI Journal
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    • 제31권6호
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    • pp.703-708
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    • 2009
  • Silicon antimony films are studied as resistors for uncooled microbolometers. We present the fabrication of silicon films and their alloy films using sputtering and plasma-enhanced chemical vapor deposition. The sputtered silicon antimony films show a low 1/f noise level compared to plasma-enhanced chemical vapor deposition (PECVD)-deposited amorphous silicon due to their very fine nanostructure. Material parameter K is controlled using the sputtering conditions to obtain a low 1/f noise. The calculation for specific detectivity assuming similar properties of silicon antimony and PECVD amorphous silicon shows that silicon antimony film demonstrates an outstanding value compared with PECVD Si film.

Investigations on Microcrystalline Silicon Films for Solar Cell Application

  • Hwang, Hae-Sook;Park, Min-Gyu;Ruh, Hyun;Yu, Hyun-Ung
    • Bulletin of the Korean Chemical Society
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    • 제31권10호
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    • pp.2909-2912
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    • 2010
  • Hydrogenated microcrystalline silicon (${\mu}c$-Si:H) thin film for solar cells is prepared by plasma-enhanced chemical vapor deposition and physical properties of the ${\mu}c$-Si:H p-layer has been investigated. With respect to stable efficiency, this film is expected to surpass the performance of conventional amorphous silicon based solar cells and very soon be a close competitor to other thin film photovoltaic materials. Silicon in various structural forms has a direct effect on the efficiency of solar cell devices with different electron mobility and photon conversion. A Raman microscope is adopted to study the degree of crystallinity of Si film by analyzing the integrated intensity peaks at 480, 510 and $520\;cm^{-1}$, which corresponds to the amorphous phase (a-Si:H), microcrystalline (${\mu}c$-Si:H) and large crystals (c-Si), respectively. The crystal volume fraction is calculated from the ratio of the crystalline and the amorphous phase. The results are compared with high-resolution transmission electron microscopy (HR-TEM) for the determination of crystallinity factor. Optical properties such as refractive index, extinction coefficient, and band gap are studied with reflectance spectra.

도핑되지 않은 비정질 실리콘의 고밀도 $Cl_2$/HBr/$O_2$플라즈마에 의한 식각 시 나칭효과 (Notching Effect during the Etching of Undoped Amorphous Silicon using High Density $Cl_2$/HBr/$O_2$Plasma)

  • 유석빈;김남훈;김창일;장의구
    • 한국전기전자재료학회논문지
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    • 제13권8호
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    • pp.651-657
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    • 2000
  • The notching effect in etching of undoped amorphous silicon gate had different characteristics and mechanism comparing with reported ones. The undoped amorphous silicon was etched by using HBr gas plasma. First in the region of small line width the potential increased as a result of ions in the exposed surface of oxide and the incident ions between the small line widths were deflected more wide range therefore the depth of notching was shallow and wide. Second in the region of large line width of gate electrons were charged on the top of photoresist and the side of gate a part of ions deflected. The deflected ions were partly charged positive on the side of gate and then these partly charged ions produced potential difference. Therefore ions stored up more at independent line than at dense line and notching became deeper by Br ion bombardments.

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PECVD에 의한 질화 실리콘 박막의 증착 (Deposition of a-SiN:H by PECVD)

  • 허창우
    • 한국정보통신학회논문지
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    • 제11권11호
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    • pp.2095-2099
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    • 2007
  • 본 연구에서는 LCD, 이미지 센서 등의 개별 소자인 비정질 실리콘 박막 트랜지스터에서 게 이트 유전층 및 절연층으로 사용되는 비정질 질화 실리콘 박막을 사일랜($SiH_4$) 및 암모니아가스를 사용해서 PECVD(Plasma Enhanced Chemical Vapor Deposition) 진공 증착장비로 최적의 비정질질화실리콘 박막 증착 조건을 확립한다. 먼저 반응실의 진공도, rf 전력, $SiH_4$ 및 질소 그리고 암모니아가스의 flow rate를 변화시키면서 형성된 박막의 특성을 조사한다. 계속해서 다른 변수를 고정시킨 상태에서 rf 전력을 변화시키고 다음에는 반응실의 진공도 등을 변화시켜 최적의 증착조건을 확립한다. 이렇게 확립된 증착조건을 사용하여 비정질질화실리콘박막을 제작하여 특성을 측정한 결과 우수한 성능을 나타냈음을 확인하였다.

Silicon Thin-Film Transistors on Flexible Polymer Foil Substrates

  • Cheng, I-Chun;Chen, Jian Z.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.1455-1458
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    • 2008
  • Amorphous silicon (a-Si:H) thin-film transistors (TFTs) are fabricated on flexible organic polymer foil substrates. As-fabricated performance, electrical bias-stability at elevated temperatures, electrical response under mechanical flexing, and prolonged mechanical stability of the TFTs are studied. TFTs made on plastic at ultra low process temperatures of $150^{\circ}C$ show initial electrical performance like TFTs made on glass but large gate-bias stress instability. An abnormal saturation of the instability against operation temperature is observed.

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Joule-heating induced crystallization (JIC) of amorphous silicon films

  • Hong, Won-Eui;Lee, Joo-Yeol;Kim, Bo-Kyung;Ro, Jae-Sang
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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    • pp.459-462
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    • 2007
  • An electric field was applied to a conductive layer to induce Joule heating in order to carry out the crystallization of amorphous silicon. Polycrystalline silicon was produced through a solid state transformation within the range of a millisecond. Uniformly distributed grains were obtained due to enormously high heating rate.

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OLED 디스플레이 제작을 위한 Joule 유도 결정화 공정에서의 유리기판에 대한 열해석 (Thermal Analysis on Glass Backplane of OLED Displays During Joule Induced Crystallization Process)

  • 김동현;박승호;홍원의;정장균;노재상;이성혁
    • 대한기계학회논문집B
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    • 제33권10호
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    • pp.797-802
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    • 2009
  • Large area crystallization of amorphous silicon thin-films on glass substrates is one of key technologies in manufacturing flat displays. Among various crystallization technologies, the Joule induced crystallization (JIC) is considered as the highly promising one in the OLED fabrication industries, since the amorphous silicon films on the glass can be crystallized within tens of microseconds, minimizing the thermally and structurally harmful influence on the glass. In the JIC process the metallic layers can be utilized to heat up the amorphous silicon thin films beyond the melting temperatures of silicon and can be fabricated as electrodes in OLED devices during the subsequent processes. This numerical study investigates the heating mechanisms during the JIC process and estimates the deformation of the glass substrate. Based on the thermal analysis, we can understand the temporal and spatial temperature fields of the backplane and its warping phenomena.

Excimer Laser Annealing 결정화 방법 및 고유전 게이트 절연막을 사용한 poly-Si TFT의 특성 (Characteristics of poly-Si TFTs using Excimer Laser Annealing Crystallization and high-k Gate Dielectrics)

  • 이우현;조원주
    • 한국전기전자재료학회논문지
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    • 제21권1호
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    • pp.1-4
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    • 2008
  • The electrical characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) crystallized by excimer laser annealing (ELA) method were evaluated, The polycrystalline silicon thin-film transistor (poly-Si TFT) has higher electric field-effect-mobility and larger drivability than the amorphous silicon TFT. However, to poly-Si TFT's using conventional processes, the temperature must be very high. For this reason, an amorphous silicon film on a buried oxide was crystallized by annealing with a KrF excimer laser (248 nm)to fabricate a poly-Si film at low temperature. Then, High permittivity $HfO_2$ of 20 nm as the gate-insulator was deposited by atomic layer deposition (ALD) to low temperature process. In addition, the solid phase crystallization (SPC) was compared to the ELA method as a crystallization technique of amorphous-silicon film. As a result, the crystallinity and surface roughness of poly-Si crystallized by ELA method was superior to the SPC method. Also, we obtained excellent device characteristics from the Poly-Si TFT fabricated by the ELA crystallization method.

Relationship between Secondary Electron Emissions and Film Thickness of Hydrogenated Amorphous Silicon

  • Yang, Sung-Chae;Chu, Byung-Yoon;Ko, Seok-Cheol;Han, Byoung-Sung
    • KIEE International Transactions on Electrophysics and Applications
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    • 제4C권4호
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    • pp.185-189
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    • 2004
  • The temporal variation of a secondary electron emission coefficient (${\gamma}$ coefficient) of hydrogenated amorphous silicon (a-Si:H) was investigated in a dc silane plasma. Estimated ${\gamma}$ coefficients have a value of 2.73 ${\times}$ 10$^{-2}$ on the pure aluminum electrode and 1.5 ${\times}$ 10$^{-3}$ after 2 hours deposition of -Si:H thin films on a cathode. It showed an abrupt decrease for about 30 minutes before saturation. The variation of the ${\gamma}$ coefficient was estimated as a function of the thin film thickness, and the film thickness was about 80 nm after 30 minutes deposition time. These results are compared with the results of a computer simulation for ion penetration into a cathode.

Amorphous Silicon의 電解鍍金

  • 이주성
    • 한국표면공학회지
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    • 제17권2호
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    • pp.59-63
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    • 1984
  • 하루가 다르게 발전하고 있는 최첨단기술인 電子材料의 膜 형성기술중 amorphous silicon(a-Si) 을 電氣鍍金으로 얻는 방법을 소개하였다. 1975년 a-Si이 p-n制御가 가능한 半導體임이 확인된 이후, 큰 면적의 太陽電池, 複寫機用 感光體薄膜, transistor array 등의 응용이 착착 진행되고 있다. 종래의 單結晶실리콘 半導體를 이용한 太陽電池는 가격면에서 비싸 경제성이 적었던 것이 a-Si의 등장으로 小型 計算機등에 까지 a-Si을 사용한 太陽電池로 電源을 대체하기 시작하여 빠른속도로 시장이 확대되어가고 있다. 특히 a-Si는 햇빛은 물론 형광등의 파장범위에서도 光應答을 하기때문에 太陽電池로서 일상생활에 광범위하게 이용될 전망이 있다. 이 a-Si의 제법으로는 蒸着法, sputtering 法, glow 放電分解法등 매우 복잡한 장치를 이용하여 膜을 형성시키고 있으나 장치가 간단하고 값싼 電氣鍍金法도 가능성이 있음이 기초적으로 알려지기 시작하였다. 본 자료는 일본 三重大學의 Y.Takeda와 O.Yamamoto가 "Amorphous Silicon의 電解析出"이란 제목으로 최근발간된 학술잡지 [電氣化學 52(7),460(1984)]에 실린 글로서 電氣都給方法이 최첨단기술분야에도 일익을 담당하고 있어 흥미로와 여기에 소개하였다.

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