• Proceedings of the KOSOMBE Conference
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• v.1997 no.05
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• pp.457-460
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• 1997

The photoconductive gain mechanism in various types of hydrogenated amorphous silicon devices, such as p-i-n, n-i-n and n-i-p-i-n structures was investigated in connection with applications to radiation detection. We measured the photoconductive gain in two time scales: one for short pulses of visible light $(<1{\mu}sec)$ which simulate the transit of energetic charged particles, and the other for rather long pulses of light $(\sim1msec)$ which simulate x-ray exposure in medical imaging. We used two definitions of photoconductive gain: current gain and charge gain which is an integration of the current gain. We found typical charge gains of $3\sim9$ for short pulses and a few hundred for long pulses at a dark current density level of $10mA/cm^2$.

• Proceedings of the KIEE Conference
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• 2006.07d
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• pp.2061-2062
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• 2006

a-Si(amorphous silicon) TFT(thin film transistor)는 TFT-LCD(liquid crystal display)의 화소 스위칭(switching) 소자로 폭넓게 이용되고 있다. 현재는 a-Si을 이용하여 gate drive IC를 기판에 집적하는 ASG(amorphous silicon gate) 기술이 연구, 적용되고 있는데 이때 가장 큰 제약은 문턱 전압(Vth)의 이동이다. 특히 고온에서는 문턱 전압의(Vth) 이동이 가속화 되고, Ioff current가 증가 하게 되고, 저온($0^{\circ}C$)에서는 전류 구동능력이 상온($25^{\circ}C$) 상태에서 같은 게이트 전압(Vg)에 대해서 50% 수준으로 감소하게 된다. 특히 ASG 회로는 여러 개의 TFT로 구성되는데, 각각의 TFT가 고온에서 Vth shift 값이 다르게 되어 설계시 예상하지 못 한 고온에서의 화면 무너짐 현상 즉 고온 노이즈 불량이 발생 할 수 있다. 고온 노이즈 불량은 고온에서의 각 TFT의 문턱전압 및 $I_D-V_G$ 특성을 측정한 결과 고온 노이즈 불량에 영향을 주는 인자가 TFT의 width와 기생 capacitor비 hold TFT width가 영향을 주는 것으로 실험 및 시뮬레이션 결과 확인이 되었다. 발생 mechanism은 ASG 회로는 AC 구동을 하기 때문에 Voff 전위에 ripple이 발생 되는데 특히 고온에서 ripple이 크게 증가 하여 출력 signal에 영향을 주어 불량이 발생하는 것을 규명하였다.

• Transactions on Electrical and Electronic Materials
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• v.17 no.2
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• pp.98-103
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• 2016

The surface morphology of the front transparent conductive oxide (TCO) films plays a vital role in amorphous silicon thin film solar cells (a-Si TFSCs) due to their high transparency, conductivity and excellent light scattering properties. Recently, plasma textured glass surface morphologies received much attention for light trapping in a-Si TFSCs. We report various plasma textured glass surface morphologies for the high efficiency of a-Si TFSCs. Plasma textured glass surface morphologies showed high rms roughness, haze ratio with micro- and nano size surface features and are proposed for future high efficiency of a-Si TFSCs.

• Korean Journal of Materials Research
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• v.5 no.2
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• pp.197-202
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• 1995

The surface morphology and grain growth of amophous silicon (a-Si) films deposited by low pressure chemical vapor deposition (LPCVD) have been investigated as a function of deposition and in sltu annealing condition. The film deposited at the amorphous to polycrystalline transition temperature has an extra-rough, rugged surface with (311) t.exture. At the same deposition temperature, the grain structure tends to shirr. from the polycrystalline to the amorphous phase with increasing the film thickness. It is found that nucleation of a-Si during in situ annealing at the transition temperature without breaking the vacuum starts to occur from surface Si atom migration in contrast to a heterogeneous nucleation during film deposition.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1116-1118
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• 2005

We studied laser crystallization of amorphous silicon films prepared at ultra low temperatures ($<150^{\circ}C$). Amorphous silicon films having a low content of hydrogen were deposited by using catalytic chemical vapor deposition method. Influence of process parameters on the hydrogen content was investigated. Laser crystallization was performed dispensing with the preliminary dehydrogenation process. Crystallization took place at a laser energy density value as low as $70\;mJ/cm^2$, and the grain size increased with increasing the laser energy. The ELA crystallization of Catalytic CVD a-Si film is a promising candidate for Poly-Si TFT in active-matrix flexible display on plastic substrates.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.5
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• pp.38-45
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• 1989

We have studied the electrical characteristics of the hydrogenated amorphous silicon (a-Si:H) ambiploar thin film transistors (TET'S)using 100ppm boron-doped a-Si:H as an active layer. The enhancement of drain current due to the double injection behavior has been observed in the p-channel operation of the TFT. The drain current decreases with time in streched exponential form when the gate voltage is positive. The result indicates that the dangling bonds created by electron accumulation show identical time dependence as the diffusion of hydrogen in the film. We observed the experimental evidence that the doping efficiency changes either when the gate bias is applied or when the light is illuminated on boron-doped a-Si:H.

• Journal of the Korean Society for Precision Engineering
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• v.29 no.11
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• pp.1164-1169
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• 2012

This paper presents a study of an integrated infrared (IR) photo sensor for display application. We fabricated hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) and hydrogenated amorphous silicon germanium thin film transistor (a-SiGe:H TFT) which were bottom gate structure. We investigated the dependence of a-SiGe:H TFT characteristics on incident wavelengths. We proposed photo sensor which responded to wavelengths of IR region. Proposed pixel circuit of photo sensor was consists of switch TFT and photo TFT, and one capacitor. We developed integrated photo sensor circuit and investigated the performance of the proposed sensor circuit according to the input wavelengths. The developed photo sensor circuit with a-SiGe:H TFT was suitable for IR.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.341.1-341.1
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• 2014

In the advanced material for the next generation display device, transparent amorphous oxide semiconductors (TAOS) are promising materials as a channel layer in thin film transistor (TFT). The TAOS have many advantages for large-area application compared with hydrogenated amorphous silicon TFT (a-Si:H) and organic semiconductor TFT. For the reasonable characteristics of TAOS, The a-IGZO has the excellent performances such as low temperature fabrication (R.T~), high mobility, visible region transparent, and reasonable on-off ratio. In this study, we investigated how the electric characteristics and physical properties are changed as various oxygen ratio when magnetron sputtering. we analysis a-IGZO film by AFM, EDS and I-V measurement. decreasing the oxygen ratio, the threshold voltage is shifted negatively and mobility is increasing. Through this correlation, we confirm the effect of oxygen ratio. We fabricated the bottom-gate a-IGZO TFTs. The gate insulator, SiO2 film was grown on heavily doped silicon wafer by thermal oxidation method. a-IGZO channel layer was deposited by RF magnetron sputtering. and the annealing condition is $350^{\circ}C$. Electrode were patterned Al deposition through a shadow mask(160/1000 um).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.141-142
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• 2008

다결정 실리콘 박막 트랜지스터를 만들기 위해 가장 많이 사용되는 제작방법은 비정질 실리콘을 기판에 형성한 뒤 결정화 시키는 방법이다. 고온에서 장시간 열처리하는 고상 결정화(SPC)와 레이저를 이용한 결정화(ELA)가 자주 사용되어진다. 그러나 SPC의 경우는 고온에서 장시간 열처리하기 때문에 유리 기판이 변형될 수 있고 ELA의 경우 장비가격이 비싸고 표면일 불균일하다는 문제점이 있다. 본 연구에서는 이 문제를 해결하기 위해서 화학 기상 증착법(저온 공정)을 이용하여 비정질 실리콘 박막을 증착 시키고, 이를 금속 촉매를 이용하여 금속 유도 결정화 방법(MIC)으로 결정화 시키는 공정을 이용하였다. 유리 기판 상부에 버퍼 층을 형성한 후 플라즈마 화학 기상 증착법(PECVD)을 이용하여 비정질 실리콘을 증착하고 Ni-solution을 이용하여 얇게 Ni 코팅하고 그 시료를 약 $650^{\circ}C$의 Rapid Thermal Annealing(RTA) 공정을 이용하여 비정질 실리콘을 다결정 실리콘으로 결정화 시키는 연구를 진행하였다. Ni 코팅시간은 20분, RTA 공정은 5시간의 진행시간을 거쳐야 최적의 결정화 정도를 만들어낸다.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.953-956
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• 2009

We have investigated the effect of light on amorphous silicon thin film transistors based photo-sensor applications. We have analyzed the instability caused by electrical gate bias stresses under the light illumination and the effect of photo-induced quasi-annealing on the instability. Threshold voltage ($V_{TH}$) under the negative gate bias stress with light illumination was more decreased than that under the negative gate bias stress without light illumination even though $V_{TH}$ caused by the light-induced stress without negative gate bias was shifted positively. These results are because the increase of carrier density in a channel region caused by the light illumination has the enhanced effect on the instability caused by negative gate bias stress. The prolonged light illumination led to the recovery of shifted VTH caused by negative gate bias stress under the light illumination due to the recombination of trapped hole charges.