• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.10
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• pp.83-90
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• 1998

The effects of dopant activation anneal on GOI (Gate Oxide Integrity) of MOS capacitor with amorphous silicon gate electrode were investigated. It was found that the amorphous silicon gate electrode was crystallized and the dopant atoms were sufficiently activated by activation anneal. The mechanical stress of gate electrode that reveals large compressive stress in amorphous state, was released with increase of anneal temperature from $700^{\circ}C$ to 90$0^{\circ}C$. The resistivity of gate electrode polycrystalline silicon film is decreased by the increase of anneal temperature. The reliability of thin gate oxide and interface properties between oxide and silicon substrate greatly depends on the activation anneal temperature. The charge trapping characteristics as well as oxide reliability are improved by the anneal of 90$0^{\circ}C$ compare to that of $700^{\circ}C$ or 80$0^{\circ}C$. Especially, the lifetimes of the thin gate oxide estimated by TDDB method is 3$\times$10$^{10}$ for the case of $700^{\circ}C$ anneal, is significantly increased to 2$\times$10$^{12}$ for the case of 90$0^{\circ}C$ anneal. Finally, the interface trap density is reduced with relaxation of mechanical stress of gate electrode.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.405-407
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• 2004

We have optimized the low temperature growth of microcrystalline silicon at 80$^{\circ}C$. This material has been used to fabricate bottom gate ${\mu}c$-Si:H TFTs by using a layer-by-layer nitrogenation process. By using this process the amorphous incubation layer can be converted into silicon nitride and leads to an increase in field effect mobility of the TFT

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.263-267
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• 2002

We are standing at the beginning of the industrialization of flexible thin-film transistor backplanes. An important group of candidates is based on silicon thin films made on metal or plastic foils. The main features of amorphous, nanocrystalline and microcrystalline silicon films for TFTs are summarized, and their compatibility with foil substrate materials is discussed.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.141-141
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• 2010

The effect of thermal anneal on the characteristics of structural properties and the enhancement of luminescence and photovoltaic (PV) characteristics of silicon-rich silicon-nitride films were investigated. By using an ultra high vacuum ion beam sputtering deposition, B-doped silicon-rich silicon-nitride (SRSN) thin films, with excess silicon content of 15 at. %, on P-doped (n-type) Si substrate was fabricated, sputtering a highly B doped Si wafer with a BN chip by N plasma. In order to examine the influence of thermal anneal, films were then annealed at different temperature up to $1100^{\circ}C$ under $N_2$ environment. Raman, X-ray diffraction, and X-ray photoemission spectroscopy did not show any reliable evidence of amorphous or crystalline Si clusters allowing us concluding that nearly no Si nano-cluster could be formed through the precipitation of excess Si from SRSN matrix during thermal anneal. Instead, results of Fourier transform infrared and X-ray photoemission spectroscopy clearly indicated that defective, amorphous Si-N matrix of films was changed to be well-ordered thanks to high temperature anneal. The measurement of spectral ellipsometry in UV-visible range was carried out and we found that the optical absorption edge of film was shifted to higher energy as the anneal temperature increased as the results of thermal anneal induced formation of $Si_3N_4$-like matrix. These are consistent with the observation that higher visible photoluminescence, which is likely due to the presence of Si-N bonds, from anneals at higher temperature. Based on these films, PV cells were fabricated by the formation of front/back metal electrodes. For all cells, typical I-V characteristic of p-n diode junction was observed. We also tried to measure PV properties using a solar-simulator and confirmed successful operation of PV devices. Carrier transport mechanism depending on anneal temperature and the implication of PV cells based on SRSN films were also discussed.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.1
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• pp.699-704
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• 2018

One-dimensional nanostructures have attracted increasing attention because of their unique electronic, optical, optoelectrical, and electrochemical properties on account of their large surface-to-volume ratio and quantum confinement effect. Vertically grown nanowires have a large surface-to-volume ratio. The vapor-liquid-solid (VLS) process has attracted considerable attention for its self-alignment capability during the growth of nanostructures. In this study, vertically aligned silicon oxide nano-pillars were grown on Si\$SiO_2$(300 nm)\Pt substrates using two-zone thermal chemical vapor deposition system via the VLS process. The morphology and crystallographic properties of the grown silicon oxide nano-pillars were investigated by field emission scanning electron microscopy and transmission electron microscopy. The diameter and length of the grown silicon oxide nano-pillars were found to be dependent on the catalyst films. The body of the silicon oxide nano-pillars exhibited an amorphous phase, which is consisted with Si and O. The head of the silicon oxide nano-pillars was a crystalline phase, which is consisted with Si, O, Pt, and Ti. The vertical alignment of the silicon oxide nano-pillars was attributed to the preferred crystalline orientation of the catalyst Pt/Ti alloy. The vertically aligned silicon oxide nano-pillars are expected to be applied as a functional nano-material.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.135.1-135.1
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• 2014

Silicon nanoparticles can be synthesized in a standard radio-frequency glow discharge system at low temperature (${\sim}200^{\circ}C$). Plasma synthesis of silicon nanoparticles, initially a side effect of powder formation, has become over the years an exciting field of research which has opened the way to new opportunities in the field of materials deposition and their application to optoelectronic devices. Hydrogenated polymorphous silicon (pm-Si:H) has a peculiar microstructure, namely a small volume fraction of plasma synthesized silicon nanoparticles embedded in an amorphous matrix, which originates from the unique deposition mechanism. Detailed discussion on plasma synthesis of silicon nanoparticles, growth mechanism and photovoltaic application of pm-Si:H will be presented.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.2
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• pp.278-285
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• 1994

Aging test was done by loading back method for 20kVA amorphous core transformers manufactured by Hyosung Industries Co. and korea Electric Power Corporation. Iron losses, copper losses and insulation oil temperatures of the transfromers was measured for all the testing period. Expected life of amorphous core transformers on the basis of the degradation of the insulators was 46 years at 100% load, and 2.4 years at 130% load. Average temperature rising of transformer oil of amorphous core transformers was higher than that of silicon steel core transformers. Hence lowering the oil temperature by optimized design is needed for improving the expected life of the amorphous transformers.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.347.1-347.1
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• 2016

Screen printing is commonly used to form the electrode for crystalline silicon solar cells. However, it has caused high resistance and low aspect ratio, resulting in decrease of conversion efficiency. Accordingly, Ni/Cu/Ag plating method could be applied for crystalline silicon solar cells to reduce contact resistance. For Ni/Cu/Ag plating, laser ablation process is required to remove anti-reflection layers prior to the plating process, but laser ablation results in surface damage and then decrease of open-circuit voltage and cell efficiency. Another issue with plating process is ghost plating. Ghost plating occurred in the non-metallized region, resulting from pin-hole in anti-reflection layer. In this paper, we investigated the effect of Ni/Cu/Ag plating on the electrical properties, compared to screen printing method. In addition, phosphoric acid layer was spin-coated prior to laser ablation to minimize emitter damage by the laser. Phosphorous elements in phosphoric acid generated selective emitter throughout emitter layer during laser process. Then, KOH treatment was applied to remove surface damage by laser. At this step, amorphous silicon formed by laser ablation was recrystallized during firing process and remaining of amorphous silicon was removed by KOH treatment. As a result, electrical properties as Jsc, FF and efficiency were improved, but Voc was lower than screen printed solar cells because Voc was decreased due to surface damage by laser process. Accordingly, we expect that efficiency of solar cells could be improved by optimization of the process to remove surface damage.

• Korean Journal of Materials Research
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• v.21 no.2
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• pp.120-124
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• 2011

Silicon heterojunction solar cells have been studied by many research groups. In this work, silicon heterojunction solar cells having a simple structure of Ag/ZnO:Al/n type a-Si:H/p type c-Si/Al were fabricated. Samples were fabricated to investigate the effect of transparent conductive oxide growth conditions on the interface between ZnO:Al layer and a-Si:H layer. One sample was deposited by ZnO:Al at low working pressure. The other sample was deposited by ZnO:Al at alternating high working pressure and low working pressure. Electrical properties and chemical properties were investigated by light I-V characteristics and AES method, respectively. The light I-V characteristics showed better efficiency on sample deposited by ZnO:Al by alternating high working pressure and low working pressure. Atomic concentrations and relative oxidation states of Si, O, and Zn were analyzed by AES method. For poor efficiency samples, Si was diffused into ZnO:Al layer and O was diffused at the interface of ZnO:Al and Si. Differentiated O KLL spectra, Zn LMM spectra, and Si KLL spectra were used for interface reaction and oxidation state. According to AES spectra, sample deposited by high working pressure was effective at reducing the interface reaction and the Si diffusion. Consequently, the efficiency was improved by suppressing the SiOx formation at the interface.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.29 no.2
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• pp.50-53
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• 2019

In this study, polycrystalline silicon thin film useful for the solar cells was fabricated by AIC(Aluminum Induced Crystallization) process. A diffusing barrier for this process is prepared with $Al_2O_3$. For the maximization of the grain size of the polycrystalline silicon, a selective blasting of the $Al_2O_3$ diffusing barrier was conducted before annealing treatment. The heat treatment for the activation of the amorphous-Si (a-Si) layer was carried out with Rapid Thermal Annealing (RTA) process. Crystallization of the a-Si layer was analyzed with XRD. It was confirmed that a-Si was crystallized at $500^{\circ}C$ and the silicon crystal is observed to be formed and the grain size of the polycrystalline silicon was observed to be $15.9{\mu}m$.