• Journal of the Optical Society of Korea
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• v.14 no.2
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• pp.137-141
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• 2010

We report, for the first time to our knowledge, observation of polarization bistability from 1.55-${\mu}m$ wavelength single-mode VCSELs of a conventional cylinder-shape under control of their driving current, and demonstration of all-optical flip-flop (AOFF) operations based on the bistability with optical set and reset pulse injection at a 50 MHz switching frequency. The injection pulse energy was less than 14 fJ. The average on-off contrast ratio of the flip-flopped signals was about 7 dB. These properties of the VCSELs will be potentially useful for future high-speed all-optical signal processing applications.

• Journal of the Optical Society of Korea
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• v.20 no.6
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• pp.698-703
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• 2016

We report a new all-optical flip-flop (AOFF) with a quite simple structure, using optical beating in an injection-locked Fabry-Perot laser diode (FP-LD) with optical bistability. While conventional AOFF methods using an injection-locked FP-LD require additional devices such as secondary FP-LDs or polarization controllers for reset operation, the proposed method can be implemented using only a single commercially available FP-LD with set and reset signals. The optical beating induces intensity fluctuations inside the FP-LD, and releases the locking state to the reset state. Even though we demonstrated the AOFF at 100 Mbit/s, we expect that its operation rate could extend to 10 Gbit/s, according to the limit of the FP-LD's frequency response.

• Current Optics and Photonics
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• v.4 no.5
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• pp.405-410
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• 2020

A new all-optical flip-flop (AOFF) method based on the absorption nulls of an injection-locked Fabry-Perot laser diode (FP-LD) in transverse magnetic (TM) mode is proposed and experimentally demonstrated. For the set and reset operations of the AOFF, injection locking and the destructive minus of beating in transverse electric (TE) mode are used. The absorption nulls on the TM mode are modulated according to the operations, and then non-inverted (Q) and inverted (${\bar{Q}}$) outputs can be obtained simultaneously. Thanks to the use of several absorption nulls, the proposed AOFF can achieve multiple outputs with extinction ratios of more than 15 dB. Even though the experiment is demonstrated at 100 Mbit/s, the results of previous experiments using the injection of a CW holding beam imply that the operation speed can increase to 10 Gbit/s.

• Proceedings of the Optical Society of Korea Conference
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• 2002.07a
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• pp.146-147
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• 2002

대용량의 정보를 고속으로 처리하는데 있어서 기존의 전자소자 성능은 제한이 있기 때문에 광소자의 개발과 그 응용에 대한 관심이 증가하고 있다. 광쌍안정 소자는 파장 변환기, 광클럭 발생기, 광신호 재생기, 광논리소자, 광메모리 등의 광 기능소자에 이용될 수 있다. 광쌍안정 소자는 매질의 비선형 특성과 궤환 구조를 필요로 하며, 주요 메커니즘에 따라 흡수형 광쌍안정 소자와 분산형 광쌍안정 소자로 구별된다. (중략)

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.04b
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• pp.109-111
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• 2002

We have demonstrated all-opticalflip-flop based on optical bistability in a SOA/DFB-SOA with broadband gain. Input signal with the wavelength of 1340.23 nm or 1680.93 nm and the current of about 98% of the lasing threshold is injected into theDFB-SOA. Current injected into SOA is 80 mA All-optical flip-flop has various applications such as all-optical memory, demultiplexing, packet-header buffering, and retiming.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.454-464
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• 2002

In the ATM-PON (Asynchronous Transfer Mode-Passive Optical Network), the downstream cell transmitted by an OLT is broadcast to all ONUs. The ONU receives selectively its own cells by VP filtering. On the other hand, the upstream cell can be transmitted by ONU in the case of receiving a grant from the OLT. After providing the grant to an ONU, the OLT expects the arrival of a cell after an elapse of the equalized round trip delay. ITU-T G.983.1 recommends that one bit error is allowed between the expected arrival time and the actual arrival time at the OLT. Because the ONU processes the different delay to each type of grant (ranging, user cell, and mimi-slot grant), it is not simple to design the transmission part of ONU. In this paper, we implement a grant processor which provides the delay accurately in the ONU TC chip with the FPGA. For the given equalized delay, it deals with the delay for the cell, the byte, and the bit unit by using the shift register, the byte counter, and the D flip-flop, respectively. We verify the operation of the grant processor by the time simulation and the measurement of the optical board output.