• Proceedings of the Korean Society of Computer Information Conference
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• 2012.01a
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• pp.119-122
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• 2012

정보화시대에 요구하는 인재는 문제를 인식하고 이런 문제를 풀기 위해 다양한 전문가들과 함께 창의적인 사고를 통해 해결책을 제시하는 인물이다. 정보영재교육의 목표 역시 창의적 인재를 기르는 데 있으나, 프로그래밍과 알고리즘 교육은 특정 프로그래밍 언어의 사용법이나 문법 위주의 교육, 정렬 및 탐색과 같은 알고리즘 그 자체에 치중함으로서 이러한 목표에 도달하고 있지 못하다는 지적이 많다. 이에 본 논문에서는 창의적인 알고리즘을 설계하고 개발하는데 필요한 사고력, 즉 사고 과정에 대해 안내하고 생각하는 알고리즘적 사고력을 기르기 위한 방안으로 실생활 주제의 이야기 쓰기를 활용하는 교수 학습 프로그램을 제안하였다. 반성적 사고와 창의성을 기르는 데 효과적인 것으로 알려진 이야기 쓰기 활동에서 출발하여 사건 요소 추출과 시간적 질서 분석하기, 순서도로 알고리즘 표현하기, 동료 학습자와 토의하기 등의 과정을 통해 알고리즘적 사고력을 향상시킬 수 있도록 하였다.

• The Journal of Korea Robotics Society
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• v.13 no.2
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• pp.129-141
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• 2018

This paper proposes a unified framework that overcomes four motion constraints including joint limit, kinematic singularity, algorithmic singularity and obstacles. The proposed framework is based on our previous works which can insert or remove tasks continuously using activation parameters and be applied to avoid joint limit and singularity. Additionally, we develop a method for avoiding obstacles and combine it into the framework to consider four motion constraints simultaneously. The performance of the proposed framework was demonstrated by simulation tests with considering four motion constraints. Results of the simulations verified the framework's effectiveness near joint limit, kinematic singularity, algorithmic singularity and obstacles. We also analyzed sensitivity of our algorithm near singularity when using closed loop inverse kinematics depending on magnitude of gain matrix.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.4
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• pp.391-406
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• 2014

The performance of General-Purpose computation on Graphics Processing Units (GPGPU) is heavily dependent on the memory access behavior. This sensitivity is due to a combination of the underlying Massively Parallel Processing (MPP) execution model present on GPUs and the lack of architectural support to handle irregular memory access patterns. Application performance can be significantly improved by applying memory-access-pattern-aware optimizations that can exploit knowledge of the characteristics of each access pattern. In this paper, we present an algorithmic methodology to semi-automatically find the best mapping of memory accesses present in serial loop nest to underlying data-parallel architectures based on a comprehensive static memory access pattern analysis. To that end we present a simple, yet powerful, mathematical model that captures all memory access pattern information present in serial data-parallel loop nests. We then show how this model is used in practice to select the most appropriate memory space for data and to search for an appropriate thread mapping and work group size from a large design space. To evaluate the effectiveness of our methodology, we report on execution speedup using selected benchmark kernels that cover a wide range of memory access patterns commonly found in GPGPU workloads. Our experimental results are reported using the industry standard heterogeneous programming language, OpenCL, targeting the NVIDIA GT200 architecture.

• Journal of the Korea Society of Computer and Information
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• v.20 no.11
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• pp.191-197
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• 2015

Recently, it has been activated the software education or coding education for the improvement of the Computational Thinking (CT) ability at home and abroad. Also the CT has influence on courses of Computer Science in the college levels. It has been introduced and the number of cases of using it to general K12 education has increased. However, the research on the software education's influence on the CT was still lacking. So In this paper, we proposed this study has been conducted on how Scratch education in the elementary school level influenced the ability of the CT. And we proposed software education can improve the ability of CT. First, we provided the theoretical base of the software education and evaluation process through analysis of computational thinking ability. A core analysis content of the CT is broader than algorithmic thinking and can be achieved without using computer. It includes abstract, algorithmic, logical, and measurable thinking. Second, we made efforts to improve the characteristics of the software education with categorization. Finally, we have managed the software education using Picoboard with Scratch and flowchart within 15 weeks based on these theocratical research. An examination of the effectiveness was committed to understand, analyze, and develop strategies of problem solving. It is designed as a strategy of problem solving before and after the software lesson. The result of the software education has improved authentically in all areas without the need to design a strategy for problem solving.

• The KIPS Transactions:PartB
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• v.12B no.2 s.98
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• pp.203-208
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• 2005

We propose an algorithmic approach for handling linguistic values defined in the same linguistic variable. Using the proposed approach, we can explicitly capture the differences of individuals' subjectivity with respect to linguistic values defined in the same linguistic variable. The proposed approach can be employed as a useful tool for discovering hidden relationship among linguistic values defined in the same linguistic variable. Consequently, it provides a basis for improving the precision of knowledge acquisition in the development of fuzzy systems including fuzzy expert systems, fuzzy decision tree, fuzzy cognitive map, ok. In this paper, we apply the proposed approach to a collective linguistic assessment among multiple experts.

• Wind and Structures
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• v.32 no.1
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• pp.71-80
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• 2021

In steel cable bridges, the use of magnetorheological (MR) dampers between butt cables is constantly increasing to dampen vibrations caused by rain and wind. The biggest problem in the actual applications of those devices is to launch a kind of appropriate algorithm that can effectively and efficiently suppress the perturbation of the tie through basic calculations and optimal solutions. This article discusses the optimal evolutionary design based on a linear and quadratic regulator (hereafter LQR) to lessen the perturbation of the bridges with cables. The control numerical algorithms are expected to effectively and efficiently decrease the possible risks of the structural response in amplification owing to the feedback force in the direction of the MR attenuator. In addition, these numerical algorithms approximate those optimal linear quadratic regulator control forces through the corresponding damping and stiffness, which significantly lessens the work of calculating the significant and optimal control forces. Therefore, it has been shown that it plays an important and significant role in the practical application design of semiactive MR control power systems. In the present proposed novel evolutionary parallel distributed compensator scheme, the vibrational control problem with a simulated demonstration is used to evaluate the numerical algorithmic performance and effectiveness. The results show that these semiactive MR control numerical algorithms which are present proposed in the present paper has better performance than the optimal and the passive control, which is almost reaching the levels of linear quadratic regulator controls with minimal feedback requirements.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.16 no.10
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• pp.3355-3372
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• 2022

Composing music is an inspired yet challenging task, in that the process involves many considerations such as assigning pitches, determining rhythm, and arranging accompaniment. Algorithmic composition aims to develop algorithms for music composition. Recently, algorithmic composition using artificial intelligence technologies received considerable attention. In particular, computational intelligence is widely used and achieves promising results in the creation of music. This paper attempts to provide a survey on the music generation based on the Monte Carlo (MC) algorithm. First, transform the MIDI music format files to digital data. Among these data, use the logistic fitting method to fit the time series, obtain the time distribution regular pattern. Except for time series, the converted data also includes duration, pitch, and velocity. Second, using MC simulation to deal with them summed up their distribution law respectively. The two main control parameters are the value of discrete sampling and standard deviation. Processing the above parameters and converting the data to MIDI file, then compared with the output generated by LSTM neural network, evaluate the music comprehensively.

• The Mathematical Education
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• v.63 no.2
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• pp.233-254
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• 2024

This paper delves into the symbiotic integration of coding and mathematics education, aimed at cultivating computational thinking and enriching mathematical problem-solving proficiencies. We have identified a corpus of scholarly articles (n=38) disseminated within the preceding two decades, subsequently culling a portion thereof, ultimately engendering a contemplative analysis of the extant remnants. In a swiftly evolving society driven by the Fourth Industrial Revolution and the ascendancy of Artificial Intelligence (AI), understanding the synergy between these domains has become paramount. Mathematics education stands at the crossroads of this transformation, witnessing a profound influence of AI. This paper explores the evolving landscape of mathematical cognition propelled by AI, accentuating how AI empowers advanced analytical and problem-solving capabilities, particularly in the realm of big data-driven scenarios. Given this shifting paradigm, it becomes imperative to investigate and assess AI's impact on mathematics education, a pivotal endeavor in forging an education system aligned with the future. The symbiosis of AI and human cognition doesn't merely amplify AI-centric thinking but also fosters personalized cognitive processes by facilitating interaction with AI and encouraging critical contemplation of AI's algorithmic underpinnings. This necessitates a broader conception of educational tools, encompassing AI as a catalyst for mathematical cognition, transcending conventional linguistic and symbolic instruments.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.65-73
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• 2006

This work presents a 14b 200KS/s $0.87mm^2$ 1.2mW 0.18um CMOS algorithmic A/D converter (ADC) for intelligent sensors control systems, battery-powered system applications simultaneously requiring high resolution, low power, and small area. The proposed algorithmic ADC not using a conventional sample-and-hold amplifier employs efficient switched-bias power-reduction techniques in analog circuits, a clock selective sampling-capacitor switching in the multiplying D/A converter, and ultra low-power on-chip current and voltage references to optimize sampling rate, resolution, power consumption, and chip area. The prototype ADC implemented in a 0.18um 1P6M CMOS process shows a measured DNL and INL of maximum 0.98LSB and 15.72LSB, respectively. The ADC demonstrates a maximum SNDR and SFDR of 54dB and 69dB, respectively, and a power consumption of 1.2mW at 200KS/s and 1.8V. The occupied active die area is $0.87mm^2$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.69-76
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• 2008

This work proposes a 12b 1kS/s 65uA 0.35um CMOS algorithmic ADC for sensor interface applications such as accelerometers and gyro sensors requiring high resolution, ultra-low power, and small size simultaneously. The proposed ADC is based on an algorithmic architecture with recycling techniques to optimize sampling rate, resolution, chip area, and power consumption. Two versions of ADCs are fabricated with a conventional open-loop sampling scheme and a closed-loop sampling scheme to investigate the effects of offset and 1/f noise during dynamic operation. Switched bias power-reduction techniques and bias circuit sharing reduce the power consumption of amplifiers in the SHA and MDAC. The current and voltage references are implemented on chip with optional of-chip voltage references for low-power SoC applications. The prototype ADC in a 0.35um 2P4M CMOS technology demonstrates a measured DNL and INL within 0.78LSB and 2.24LSB, and shows a maximum SNDR and SFDR of 60dB and 70dB in versionl, and 63dB and 75dB in version2 at 1kS/s. The versionl and version2 ADCs with an active die area of $0.78mm^2$ and $0.81mm^2$ consume 0.163mW and 0.176mW at 1kS/s and 2.5V, respectively.