• Title/Summary/Keyword: Algorithm Execution time

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The Effect of Algorithm Execution Time Analysis using Unplugged Program on the Computational Thinking of Third Grade Students (언플러그드 방식을 활용한 알고리즘 수행시간 분석이 초등학교 3학년 학생의 컴퓨팅 사고력에 미치는 효과)

  • Kim, Jungah;Oh, Minwoo;Yang, Younghun;Kim, Taehun;Kim, Jonghoon
    • Journal of The Korean Association of Information Education
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    • v.23 no.1
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    • pp.19-27
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    • 2019
  • This study analyzed the effect of an unplugged educational program which focuses on the algorithm execution time analysis on enhancing the computational thinking of the third grade students. An unplugged educational program was developed by following the procedures of the ADDIE model based on the result of the demand analysis conducted with 70 incumbent elementary school teachers and 120 third grade students. The developed program was applied to 24 third grade students for 36 classes in six days and a comparison was made through pre-post comparison tests with 24 students who were taught with a board game program for the same period of time. As a result, the unplugged education program which focuses on the algorithm execution time analysis is deemed to have positive effect on the computational thinking of the third grade students.

Program Osptimality Using Network Partiton in Embedded System (임베디드 시스템에서 네트워크 분할을 이용한 프로그램 최적화)

  • Choi Kang-Hee;Shin Hyun-Duck
    • Journal of the Korea Computer Industry Society
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    • v.7 no.3
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    • pp.145-154
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    • 2006
  • This paper improves algorithms of Speculative Partial Redundancy Elimination(SPRE) proposed by Knoop et al. Improving SPRE algorithm performs the execution speed optimization based on the information of the execution frequency from profiling and the memory space optimization. The first purpose of presented algorithm is to reduce in space requirements and the second purpose is to de crease the execution time. Since too much weight on execution speed optimization may cause the explosion of the memory space, it is important to consider the size of memory. This fact can be a big advantage in the embedded system which concerns the required memory size more than the execution speed In this paper we implemented the min-cut algorithm, and this algorithm used the control flow graph is constructed with network and partitioned.

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Dynamic Load Balancing Algorithm using Execution Time Prediction on Cluster Systems

  • Yoon, Wan-Oh;Jung, Jin-Ha;Park, Sang-Bang
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.176-179
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    • 2002
  • In recent years, an increasing amount of computer network research has focused on the problem of cluster system in order to achieve higher performance and lower cost. The load unbalance is the major defect that reduces performance of a cluster system that uses parallel program in a form of SPMD (Single Program Multiple Data). Also, the load unbalance is a problem of MPP (Massive Parallel Processors), and distributed system. The cluster system is a loosely-coupled distributed system, therefore, it has higher communication overhead than MPP. Dynamic load balancing can solve the load unbalance problem of cluster system and reduce its communication cost. The cluster systems considered in this paper consist of P heterogeneous nodes connected by a switch-based network. The master node can predict the average execution time of tasks for each slave node based on the information from the corresponding slave node. Then, the master node redistributes remaining tasks to each node considering the predicted execution time and the communication overhead for task migration. The proposed dynamic load balancing uses execution time prediction to optimize the task redistribution. The various performance factors such as node number, task number, and communication cost are considered to improve the performance of cluster system. From the simulation results, we verified the effectiveness of the proposed dynamic load balancing algorithm.

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A Dynamic Storage Allocation Algorithm with Predictable Execution Time (예측 가능한 실행 시간을 가진 동적 메모리 할당 알고리즘)

  • Jeong, Seong-Mu;Yu, Hae-Yeong;Sim, Jae-Hong;Kim, Ha-Jin;Choe, Gyeong-Hui;Jeong, Gi-Hyeon
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.7
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    • pp.2204-2218
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    • 2000
  • This paper proposes a dynamic storage allocation algorithm, QHF(quick-half-fit) for real-time systems. The proposed algorithm manages a free block list per each worked size for memory requests of small size, and a free block list per each power of 2 size for memory requests of large size. This algorithms uses the exact-fit policy for small sie requests and provides high memory utilization. The proposed algorithm also has the time complexity O(I) and enables us to easily estimate the worst case execution time (WCET). In order to confirm efficiency of the proposed algorithm, we compare he memory utilization of proposed algorithm with that of half-fit and binary buddy system that have also time complexity O(I). The simulation result shows that the proposed algorithm guarantees the constant WCET regardless of the system memory size and provides lower fragmentation ratio and allocation failure ratio thant other two algorithms.

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A Dynamic Voltage Scaling Algorithm for Aperiodic Tasks (비주기 태스크를 위한 동적 가변 전압 스케쥴링)

  • Kwon, Ki-Duk;Jung, Jun-Mo;Kwon, Sang-Hong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.7 no.5
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    • pp.866-874
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    • 2006
  • This paper proposes a new Dynamic Voltage Scaling(DVS) algorithm to achieve low-power scheduling of aperiodic hard real-time tasks. Aperiodic tasks schedulingcannot be applied to the conventional DVS algorithm and result in consuming energy more than periodic tasks because they have no period, non predictable worst case execution time, and release time. In this paper, we defined Virtual Periodic Task Set(VTS) which has constant period and worst case execution time, and released aperiodic tasks are assigned to this VTS. The period and worst case execution time of the virtual task can be obtained by calculating task utilization rate of both periodic and aperiodic tasks. The proposed DVS algorithm scales the frequency of both periodic and aperiodic tasks in VTS. Simulation results show that the energy consumption of the proposed algorithm is reduced by 11% over the conventional DVS algorithm for only periodic task.

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Fast Logic Minimization Algorithm for Programmable-Logic-Array Design (PLA 설계용 고속 논리최소화 알고리즘)

  • 최상호;임인칠
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.22 no.2
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    • pp.25-30
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    • 1985
  • This paper proposes an algorithm to simplify Boolean functions into near minimal sum-of-products for Programmable Logic Arrays. In contrast to the conventional procedures, where the execution time depends on the number of variables, the execution time by this procedure depends on the degree of consensus of base minterms. Thus as the number of variables is increased, the difference of CPU time becomes larger using this new Procedure than using other procedures and consequently the executable range of input function increasing. The algorithm has been implemented on CYEER 170-740 and it's results were compared with those using Arvalo's algorithm.

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Algorithm or Parallel Computation for a multi-CPU controlled Robot Manipulator (복수의 CPU로 제어되는 매니퓰레이터의 병렬계산 알고리즘)

  • Woo, Kwang-Bang;Kim, Hyun-Ki;Choi, Gyoo-Suck
    • Proceedings of the KIEE Conference
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    • 1987.07a
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    • pp.288-292
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    • 1987
  • The purpose of this paper is to develope the parallel computation algorithm that enables it to minimize the completion tine of computation execution of the entire subtasks, under the constraints of the series-parallel precedence relation in each subtask. The developed algorithm was applied to the control of a robot manipulator functioned by multi-CPU's and to obtain the minimum time schedule so that real time control may be achieved. The completion time of computation execution was minimized by applying "Variable" Branch and Bound algorithm which was developed In this paper in determining the optimum ordered schedule for each CPU.

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A Code Scheduling Algorithm for Pipelined Architecture (파이프라인 아키텍쳐를 위한 코드 스케쥴링 알고리듬)

  • 김은성;임인칠
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.7
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    • pp.746-758
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    • 1988
  • This paper proposes a code scheduling algorithm which gives a software solution to the pipeline interlock. This algorithm provides a heuristic solution by recordering the instructions, instead of using hardware interlock mechanism when pipeline interlock prevents the execution of a machine instruction in a pipelined architecture. Program code size and overall execution time can be reduced due to the increased flexibility in the selection of instructions, which is possible from the alleviated ordering restriction on the use of conflict resources.

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A Genetic Algorithm for Minimizing Query Processing Time in Distributed Database Design: Total Time Versus Response Time (분산 데이타베이스에서의 질의실행시간 최소화를 위한 유전자알고리즘: 총 시간 대 반응시간)

  • Song, Suk-Kyu
    • The KIPS Transactions:PartD
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    • v.16D no.3
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    • pp.295-306
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    • 2009
  • Query execution time minimization is an important objective in distributed database design. While total time minimization is an objective for On Line Transaction Processing (OLTP), response time minimization is for Decision Support queries. We formulate the sub-query allocation problem using analytical models and solve with genetic algorithm (GA). We show that query execution plans with total time minimization objective are inefficient from response time perspective and vice versa. The procedure is tested with simulation experiments for queries of up to 20 joins. Comparison with exhaustive enumeration indicates that GA produced optimal solutions in all cases in much less time.

An Efficient kNN Algorithm (효율적인 kNN 알고리즘)

  • Lee Jae Moon
    • The KIPS Transactions:PartB
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    • v.11B no.7 s.96
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    • pp.849-854
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    • 2004
  • This paper proposes an algorithm to enhance the execution time of kNN in the document classification. The proposed algorithm is to enhance the execution time by minimizing the computing cost of the similarity between two documents by using the list of pairs, while the conventional kNN uses the iist of pairs. The 1ist of pairs can be obtained by applying the matrix transposition to the list of pairs at the training phase of the document classification. This paper analyzed the proposed algorithm in the time complexity and compared it with the conventional kNN. And it compared the proposed algorithm with the conventional kNN by using routers-21578 data experimentally. The experimental results show that the proposed algorithm outperforms kNN about $90{\%}$ in terms of the ex-ecution time.