• Title/Summary/Keyword: Adjustable layout

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An Investigation of Relational Characteristics among the Design Elements of Automobile Seat Packaging with a Triangular Method (삼각기법을 이용한 자동차 운전환경 설계요소간 관계 모델링)

  • Jung, Eui-S.;Lee, Jugn-K.
    • Journal of Korean Institute of Industrial Engineers
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    • v.25 no.2
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    • pp.173-183
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    • 1999
  • The three design elements of automobile occupant packaging such as pedals, steering wheel, and seat are the most important factors to design an ergonomically sound layout for improving driving comfort and performance. The aim of the study is to find out coherent characteristics of the relationships among three design elements. For this purpose, Triangular Method is suggested. We extracted properties for determining the shape, size, and location of the triangle that is composed of Accelerated Heel Point, Steering Wheel Point, and Hip Point. An experiment was conducted at a seating buck in which the design elements are freely adjustable by the subject to investigate driver's preferred arrangement of three elements. Statistical analyses revealed that there was a subtle change in the shape of triangle according to different percentiles and that the significant difference was observed only for the size of the triangle. The results will be effectively applied to design a comfortable seat packaging layout.

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Context-aware Mobile system for Augmentative and Alternative Communication (보완대체 의사소통도구를 위한 상황인식 모바일 시스템)

  • Park, DongGyu;Kim, Young-Joo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.7
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    • pp.1740-1746
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    • 2013
  • Augmentative and alternative communication(AAC) is a communication tool for those with impairments or restrictions on the production or comprehension of spoken language. Traditional AAC has used a portable board with pictures and texts with which disabled person could be supported by it. Currently, smart phone based AAC researches and developments are actively studying. With emerging concepts of context-aware computing, the mobile devices can provide mobile users with timely information and location based services. We proposed a adjustable AAC system for disabled people of which has variable layouts and selectable items. We also implemented context-ware application for AAC systems including time, location and click count informations on smart phone. The system can adaptively change its layout and select AAC items depending on various situation of disabled persons.

Development of Iso-Perception Maps to Improve the Driver Workspace Using Drivers' Static Behaviors (운전자 정적 거동 특성을 이용한 차량 패키지 개선용 등가 인지지도 개발)

  • Ahn, Sung-Yong;Kim, Han-Woong;Han, Mi-Ran;Park, Peom;Kyung, Gyou-Hyung
    • Journal of the Ergonomics Society of Korea
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    • v.29 no.1
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    • pp.33-37
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    • 2010
  • This study was aimed at developing 1) iso-perception maps for various groups of drivers in terms of age, gender, and anthropometry and 2) the experiment framework required for obtaining subjective and objective measures. A total of 9 maps, which describe drivers' perceptions regarding their static behaviors inside a typical mid-size sedan, can be used to improve the utilization of the limited driver workspace, and to select better design alternatives for occupant packaging. An adjustable seating buck, $a^{***}$-camera motion capture system (Vicon), and $a^{**}$-channel EMG system were used for the experiment. Each iso-perception map was developed while H-PT, steering wheel center, or TGS knob center was moved to each of pre-defined positions relative to driver-selected positions. Adjustable ranges or positions of the seat, steering wheel, and TGS lever described in iso-perception maps can be used to determine better package layout alternatives.

Design of a New ISFET Array Chip

  • Yeow, Terence;Seo, Hwa-Il;Mulcahy, Dennis;Haskard, Malcolm
    • Journal of Sensor Science and Technology
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    • v.4 no.4
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    • pp.55-61
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    • 1995
  • A new ISFET array chip, based on detection of the threshold voltages of ISFETs by using an adjustable input, was designed. The chip includes 240 pH-ISFETs and circuitry such as comparators, a decoder and register. The chip has increased reliability, improved accuracy, digital output capability and the possibility of multi sensor implementation. To fabricate the chip, an extended CMOS process was devised and implemented.

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A real-time high speed full search block matching motion estimation processor (고속 실시간 처리 full search block matching 움직임 추정 프로세서)

  • 유재희;김준호
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.12
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    • pp.110-119
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    • 1996
  • A novel high speed VLSI architecture and its VLSI realization methodologies for a motion estimation processor based on full search block matching algorithm are presentd. The presented architecture is designed in order to be suitable for highly parallel and pipelined processing with identical PE's and adjustable in performance and hardware amount according to various application areas. Also, the throughput is maximized by enhancing PE utilization up to 100% and the chip pin count is reduced by reusing image data with embedded image memories. Also, the uniform and identical data processing structure of PE's eases VLSI implementation and the clock rate of external I/O data can be made slower compared to internal clock rate to resolve I/O bottleneck problem. The logic and spice simulation results of the proposed architecture are presented. The performances of the proposed architecture are evaluated and compared with other architectures. Finally, the chip layout is shown.

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A Re-configurable 0.8V 10b 60MS/s 19.2mW 0.13um CMOS ADC Operating down to 0.5V (0.5V까지 재구성 가능한 0.8V 10비트 60MS/s 19.2mW 0.13um CMOS A/D 변환기)

  • Lee, Se-Won;Yoo, Si-Wook;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.3
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    • pp.60-68
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    • 2008
  • This work describes a re-configurable 10MS/s to 100MS/s, low-power 10b two-step pipeline ADC operating at a power supply from 0.5V to 1.2V. MOS transistors with a low-threshold voltage are employed partially in the input sampling switches and differential pair of the SHA and MDAC for a proper signal swing margin at a 0.5V supply. The integrated adjustable current reference optimizes the static and dynamic performance of amplifiers at 10b accuracy with a wide range of supply voltages. A signal-isolated layout improves the capacitor mismatch of the MDAC while a switched-bias power-reduction technique reduces the power dissipation of comparators in the flash ADCs. The prototype ADC in a 0.13um CMOS process demonstrates the measured DNL and INL within 0.35LSB and 0.49LSB. The ADC with an active die area of $0.98mm^2$ shows a maximum SNDR and SFDR of 56.0dB and 69.6dB, respectively, and a power consumption of 19.2mW at a nominal condition of 0.8V and 60MS/s.