• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.7 s.349
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• pp.150-155
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• 2006

A hybrid Ad-hoc network connected to the Internet needs an IP address configuration to communicate with the Internet. Most of proposed address autoconfiguration algorithms are node based. The node based address autoconfiguration algorithms waste bandwidth and consume much battery in mobile ad-hoc networks. In this paper, we propose the address allocation algorithm in hybrid Mobile ad-hoc network (MANET). The proposed algorithm reduces network traffic by transferring address configuration packet to the internet gateway by unicast method. Moreover, our IP address configuration algorithm also reduces battery consumption and address configuration time by decreasing number of configuration packets on internet gateway.

• Journal of the Korea Society of Computer and Information
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• v.28 no.2
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• pp.1-7
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• 2023

In this paper, we propose a base address candidate selection method using the $gp register and page granularity as a way to build a static analysis environment for firmware based on MIPS architecture. As a way to shorten the base address search time, which is a disadvantage of the base address candidate selection method through inductive reasoning in existing studies, this study proposes a method to perform page-level search based on the $gp register in the existing base address candidate selection method as a reference point for search. Then, based on the proposed method, a base address search tool is implemented and a static analysis environment is constructed to prove the validity of the target tool. The results show that the proposed method is faster than the existing candidate selection method through inductive reasoning.

• The KIPS Transactions:PartC
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• v.16C no.6
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• pp.753-760
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• 2009

As it becomes increasingly important that Internet access is available anywhere at any time, providing MANET (Mobile Ad-Hoc Network) with the Internet access attracts more attention. The existing DHCP (Dynamic Host Configuration Protocol) address configuration schemes require message exchanges between MANET nodes and the DHCP server through multi-hop routes. Messages can be easily dropped in the wireless multi-hop communication environment and the address configuration may be instable and need long delay. In this paper, we propose a new address configuration scheme using the concept of address pool allocation. In the proposed scheme, the DHCP server assigns a part of its address pool to a node instead of a single address and the node can assign a part of its own address pool to its neighbor nodes. Through simulation studies, we show that our scheme yields about 77% of the address configuration delay and 61% of the control message overhead of the existing DHCP based mechanism.

• The KIPS Transactions:PartD
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• v.17D no.6
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• pp.383-394
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• 2010

Flash memory based SSDs are currently being considered as a promising candidate for replacing hard disks due to several superior features such as shorter access time, lower power consumption and better shock resistance. However, SSDs have different characteristics from hard disk such as difference of unit and time for read, write and erase operation and impossibility for over-writing. Because of these reasons, SSDs have disadvantages on hard disk based systems, so FTL(Flash Translation Layer) is designed to increase SSDs' efficiency. In this paper, we propose an advanced logical address mapping method for increasing SSDs' performance, which is named HAMM(Hybrid Address Mapping Method). HAMM addresses drawbacks of previous block-mapping method and super-block-mapping method and takes advantages of them. We experimented our method on our own SSDs simulator. In the experiments, we confirmed that HAMM uses storage area more efficiently than super-block-mapping method, given the same buffer size. In addition, HAMM used smaller memory than block-mapping method to construct mapping table, demonstrating almost same performance.

• Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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• v.5 no.2
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• pp.223-230
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• 2015

Due to the conversion from the existing address system to road name address system, the versatility of the road name address from the public and private sectors is increasing gradually. Therefor, the reliability of the road name address basic map, of the default data is also an urgent need, this means the accuracy of the data. But, road name address basic map is production time due to the use of different map accuracy is to fall, so is also the situation insufficient of utilization. This study Construction of identify each attempt by the road name address basic map and analysis the location accuracy of road name address basic map. As a result, the RMSE of cadastral survey results showed that appears lower than the RMSE of digital map survey results. The judgment can be utilized as the basis for the proposed improvements for the road name address basic map.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.564-567
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• 2004

New address electrode having separated dual electrode is suggested to reduce addressing time in ac PDP. Addressing characteristics of suggested electrode has been investigated in the test panel with high Xe partial pressure. It has been found that both the formative and jitter width of the suggested electrode is improved by 10 -20 % over the wide range of address voltage level compared with the conventional one. The dynamic margin of the panel also greatly improved. The key feature behind this type of structure is that it can extend the controllability of the wall charge distribution during the reset and address discharge without significant increase in capacitive load of address electrode.

• Proceedings of the KIEE Conference
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• 2002.07c
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• pp.1830-1833
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• 2002

We measured 3-dimensional temporal behavior of the light emitted from AC plasma display panel(PDP) at various auxiliary voltage pulse width supplied to the address electrode in sustain period using scanned point detecting system. In the case of applying an auxiliary address voltage pulse, the light emission starts at the inner edges of the cathode so the larger discharge volume toward address electrode can be obtained compared with the normal sustain discharge. Especially, when the auxiliary voltage pulse width is the $2{\mu}s$, the maximum luminance and long emission time can be obtained.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.608-611
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• 2003

A large part of the embedded system, compared with the PC, have low performance CPU and small memory. So the embedded operating system fits the condition of that hardware system. A Single Address Space (SAS) OS has the operating system and all applications in the single address space. The SAS architecture enhances sharing and co-operation, because addresses have a unique interpretation. Thus, pointer-based date structures can be directly communicated and shared between programs at any time, and can be stored directly on storage. The key point of the SAS OS on the embedded system is the low overhead inter-action between programs in process and usage. So SAS OS can be ported on the low performance CPU. In this paper, we design the SAS OS (named emNOS, Embedded Network Operating System) on the ARMTTDMI processor. Finally we show the benefits of the SAS OS on the embedded system.

• Journal of KIISE:Information Networking
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• v.33 no.2
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• pp.175-182
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• 2006

The CGA proposed by IETF working group prevents address spoofing and stealing and provides digital signature to users, but key collision problem arises. To solve this critical problem, the CGA defines the SEC field within address format, which is set to high value when high security is required and vice versa, but the CGA faces a dilemma between security and the processing time. As SEC value increases, the processing time to generate the CGA grows dramatically while key collision ratio increases if low SEC value is applied to the CGA. We propose modified CGA (MCGA) that has shorter processing time than the CGA and offers digital signature with small overheads. To solve key collision problem, we employ hierarchical ad hoc network. The MCGA is applicable to IPv6 networks as well public networks. In this paper, we design a mathematical model to analyze the processing time for MCGA and CGA first and evaluate the processing time via simulations, where the processing time for MCGA is reduced down 3.3 times when SEC value is set to 0 and 68,000 times when SEC value is set to 1. Further, we have proved that the CGA is inappropriate for both ad hoc networks and IPv6 networks when the SEC field is set to more than 3.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.1
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• pp.37-47
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• 2008

Exploitation of address generation units which are typically provided in DSPs plays an important role in DSP code generation since that perform fast address computation in parallel to the central data path. Offset assignment is optimization of memory layout for program variables by taking advantage of the capabilities of address generation units, consists of memory layout generation and address pointer assignment steps. In this paper, we propose an effective address pointer assignment method to minimize the number of address calculation instructions in DSP code generation. The proposed approach reduces the time complexity of a conventional address pointer assignment algorithm with fixed memory layouts by using minimum cost-nodes breaking. In order to contract memory size and processing time, we employ a powerful pruning technique. Moreover our proposed approach improves the initial solution iteratively by changing the memory layout for each iteration because the memory layout affects the result of the address pointer assignment algorithm. We applied the proposed approach to about 3,000 sequences of the OffsetStone benchmarks to demonstrate the effectiveness of the our approach. Experimental results with benchmarks show an average improvement of 25.9% in the address codes over previous works.