• ETRI Journal
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• v.28 no.2
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• pp.243-246
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• 2006

In a mobile ad hoc network, difficulties exist in supporting address autoconfiguration and naming resolution due to the lack of centralized servers. This letter presents a novel approach, called name-based autoconfiguration (NBA), which uses host names to determine IP addresses and provides address autoconfiguration and name resolution as a single protocol.

• Journal of the Korea Society of Computer and Information
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• v.22 no.7
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• pp.1-7
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• 2017

As the capacity of NAND flash module increases, the amount of RAM increases for caching and maintaining the FTL mapping information. In order to reduce the amount of mapping information managed in the RAM, a demand-based address mapping method stores the entire mapping information in the flash and some valid mapping information in the form of cache in the RAM so that the RAM can be used efficiently. However, when cache miss occurs, it is necessary to read the mapping information recorded in the flash, so overhead occurs to translate the address. If the RAM space is not enough, the cache hit ratio decreases, resulting in greater overhead. In this paper, we propose a method using two tables called TPMT(Translation Page Mapping Table) and SMT(Segmented Translation Page Mapping Table) to utilize both temporal locality and spatial locality more efficiently. A performance evaluation shows that this method can improve the cache hit ratio by up to 30% and reduces the extra translation operations by up to 72%, compared to the TPM scheme.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.11-14
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• 1998

Recently, the users of internet are increasing yearly with the rapid spread of internet. So, the shortage of IPv4 address is important issue to ISP. Many ISP is searching for efficient method to use IP address in ATM Network. Korea Telecom has constructed ATM Network test-bed to verify available technologies necessary for ATM Network. This paper, concerning with the configuration of subscribers in ATM Network test bed, analyze the available usage of IP address.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.345-348
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• 2001

In this paper, we present a effective low-power technique which can reduce significantly the switching activity in instruction address bus, pipeline and I-cache. Using this method, named Guarded Operation, we has implemented address register. address bus architecture without complex hardware and designed loop buffer without tag. These architectures reduce 67% of switching activity with little overhead and also increase instruction-fetch performance.

• Journal of the Korea Safety Management & Science
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• v.12 no.1
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• pp.113-118
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• 2010

"Domestic delivery service" is defined the service to deliver goods or packages from point of senders to point of receiver. With the characteristics of door to door, it is must a service provider should know the exact location of destination assuring best utilization of moving path. Generally, location information consist of postal code and address only, which result in difficulties to identify the precise location of destination. It is relatively less correlated between the information that address refers and practical location in Korea address system. For example, the next door to house number 100 is not always house number 101. Therefore, a delivery man additionally uses a paper map or a GPS navigation which carry extra job to input every code of location to the device in order to know precise location. It is also very inconvenient that every delivery man identify the location that address information refers and make a personal decision of the optimum moving path dropping each destination without calculating provisioning process of whole delivery path. As explained above, it is inefficient to find information delivery service required and to generate the optimum path. In results, these difficulties bring in delay of service and increase of cost. In this point, the contents of the thesis suggest a GPS navigation system easy to obtain accuracy of delivery information which enables to automate optimum moving path based on RFID which contains location information.

• IE interfaces
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• v.14 no.3
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• pp.247-254
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• 2001

As current postal automation is limited to dispatch and arrival sorting, delivery sequence sorting is performed manually by each postman. It not only acts as a bottleneck process in the overall mailing process but is expensive operation. To cope with this problem effectively, delivery sequence sorting automation is required. The important components of delivery sequence sorting automation system are sequence sorter and Hangul OCR which function is to extract the address of delivery point. DSI database will be interfaced to both Hangul OCR and sequence sorter for finding the accurate delivery sequence number and stacker number. The objectives of this research are to develop DSI(Delivery Sequence Information) database prototype and client application for managing information effectively. For database requirements collection and analysis, we draw all possible sorting plans, and apply the AHP(Analytic Hierarchy Process) method to determine the optimal one. And then, we design DSI database schema based on the optimal one and implement it using Oracle RDBMS. In addition, as address information in DIS database consist of hierarchical structure which has its correspondence sequence number, so it is important to reorganize sequence information accurately when address information is inserted, deleted or updated. To increase delivery accuracy, we reflect this point in writing application.

• Journal of KIISE:Computer Systems and Theory
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• v.28 no.1_2
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• pp.80-89
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• 2001

The development in the mobile computing systems have arisen new and previously unforeseen problems, such as problems in information management of mobile host, disconnection of mobile host and low bandwidths of wireless communications. Especially, location information management strategy of mobile host results in an increased overhead in mobile computing systems. Due to the mobility of the mobiles host, the changes in the mobile host's address depends on the mobile host's location, and is maintained by mapping physical address on virtual address, Since previously suggested several strategies for mapping method between physical address and virtual address did not tackle the increase of mobile host and distribution of location information, it was not able to support the scalability in mobile computing systems. Thus, to distribute the location inrormation, we propose an advanced n-depth LiST (Location information Search Tree) and the parallel location search and update strategy based on the advanced n-depth LiST. The advanced n-depth LiST is logically a hierarchical structure that clusters the location information server by ring structure and reduces the location information search and update cost by parallel seatch and updated method. The experiment shows that even though the distance of two MHs that communicate with each other is large, due to the strnctural distribution of location information, advanced n-depth LiST results in good performance. Moreover, despite the reduction in the location information search cost, there was no increase in the location information update cost.

• The KIPS Transactions:PartD
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• v.8D no.3
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• pp.273-284
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• 2001

A systematic approach for interpreting Korean addresses based on postal code is presented in this paper. The implementation is focused on producing the final delivery point code from various types of address recognized. There are two stages in the address interpretation : 1) agreement verification between the recognized postal code and upper part of the address and 2) analysis of lower part of the address. In the agreement verification procedure, the recognized postal code is used as the key to the address dictionary and each of the retrieved addresses is compared with the words in the recognized address. As the result, the boundary between the upper part and the lower part is located. The confusion matrix, which is introduced to correct possible mis-recognized characters, is applied to improve the performance of the process. In the procedure for interpreting the lower part address, a delivery code is assigned using the house number and/or the building name. Several rules for the interpretation have been developed based on the real addresses collected. Experiments have been performed to evaluate the proposed approach using addresses collected from Kwangju and Pusan areas.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.1
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• pp.14-26
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• 2008

IP over Ethernet technology widely used as Internet access uses the ARP(Address Resolution Protocol) that translates an ip address to the corresponding MAC address. recently, there are ARP security attacks that intentionally modify the IP address and its corresponding MAC address, utilizing various tools like "snoopspy". Since ARP attacks can redirect packets to different MAC address other than destination, attackers can eavesdrop packets, change their contents, or hijack the connection. Because the ARP attack is performed at data link layer, it can not be protected by security mechanisms such as Secure Shell(SSH) or Secure Sockets Layer(SSL). Thus, in this paper, we classify the ARP attack into downstream ARP spoofing attack and upstream ARP redirection attack, and propose a new security mechanism using DHCP information for acquisition of IP address. We propose a "DHCP snoop mechanism" or "DHCP sniffing/inspection mechanism" for ARP spoofing attack, and a "static binding mechanism" for ARP redirection attack. The proposed security mechanisms for ARP attacks can be widely used to reinforce the security of the next generation internet access networks including BcN.

• Proceedings of the KIEE Conference
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• 2001.11c
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• pp.376-379
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• 2001

In this paper, I design the control chip that controls inner test sequence of Logic Tester to test chip. Logic tester has the thirteen inner instructions to control test sequence in test. And these instructions are saved in memory with test pattern data. Control chip generates address and control signal such as read, write signal of memory. Before testing, necessary data such as start address, end address, etc. are written to inner register of control chip. When test started, control chip receives the instruction in start address and executes, and generates address and control signals to access tester' inner memory. So whole test sequence is controlled by making the address and control signal in tester's inner memory. Control chip designs instruction's execution blocks, respectively. So if inner instruction is added from now on, a revision is easy. The control chip will be made using FPGA of Xilinx Co. in future.