• Title/Summary/Keyword: Active power decoupling circuit

검색결과 22건 처리시간 0.022초

능동 전력 디커플링 회로의 커패시턴스 최적 설계에 관한 연구 (A Study on Optimal Design of Capacitance for Active Power Decoupling Circuits)

  • 백기호;박성민;정교범
    • 전력전자학회논문지
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    • 제24권3호
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    • pp.181-190
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    • 2019
  • Active power decoupling circuits have emerged to eliminate the inherent second-order ripple power in a single-phase power conversion system. This study proposes a design method to determine the optimal capacitance for active power decoupling circuits to achieve high power density. Minimum capacitance is derived by analyzing ripple power in a passive power decoupling circuit, a buck-type circuit, and a capacitor-split-type circuit. Double-frequency ripple power decoupling capabilities are also analyzed in three decoupling circuits under a 3.3 kW load condition for a battery charger application. To verify the proposed design method, the performance of the three decoupling circuits with the derived minimum capacitance is compared and analyzed through the results of MATLAB -Simulink and hardware-in-the-loop simulations.

3권선형 능동 전력 디커플링 기법을 적용한 플라이백 인버터의 입력 커패시턴스 분석 (Input Capacitance Analysis of Three-port Flyback Inverter with Active Power Decoupling Circuit)

  • 오민석;김규동;김준구;이태원;정용채;원충연
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2012년도 추계학술대회 논문집
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    • pp.137-138
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    • 2012
  • In this paper, three-port flyback inverter with Active Power Decoupling(APD) circuit is analyzed. Conventional flyback inverter with passive power decoupling circuit needs the electrolytic capacitor with large capacitance for decoupling between constant DC power and instantaneous AC power. However the electrolytic capacitor has low lifespan about 50000 to 100000 hours. So the active power decoupling techniques are applied to reduce input capacitance of flyback inverter. Thus the overall system can achieve smaller size and longer lifespan. Proposed three-port flyback inverter is verified by design optimization, simulation and experimental result.

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Analysis and Design of a Three-port Flyback Inverter using an Active Power Decoupling Method to Minimize Input Capacitance

  • Kim, Jun-Gu;Kim, Kyu-Dong;Noh, Yong-Su;Jung, Yong-Chae;Won, Chung-Yuen
    • Journal of Power Electronics
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    • 제13권4호
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    • pp.558-568
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    • 2013
  • In this paper, a new decoupling technique for a flyback inverter using an active power decoupling circuit with auxiliary winding and a novel switching pattern is proposed. The conventional passive power decoupling method is applied to control Maximum Power Point Tracking (MPPT) efficiently by attenuating double frequency power pulsation on the photovoltaic (PV) side. In this case, decoupling capacitor for a flyback inverter is essentially required large electrolytic capacitor of milli-farads. However using the electrolytic capacitor have problems of bulky size and short life-span. Because this electrolytic capacitor is strongly concerned with the life-span of an AC module system, an active power decoupling circuit to minimize input capacitance is needed. In the proposed topology, auxiliary winding defined as a Ripple port will partially cover difference between a PV power and an AC Power. Since input capacitor and auxiliary capacitor is reduced by Ripple port, it can be replaced by a film capacitor. To perform the operation of charging/discharging decoupling capacitor $C_x$, a novel switching sequence is also proposed. The proposed topology is verified by design analysis, simulation and experimental results.

능동 전력 디커플링을 위한 3권선 방식의 플라이백 인버터 설계 (Design of Three-port Flyback Inverter for Active Power Decoupling)

  • 김규동;김준구;이태원;정용채;원충연
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2012년도 전력전자학술대회 논문집
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    • pp.486-487
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    • 2012
  • In this paper, novel three-port active power decoupling (APD) method for applying 250[W] micro-inverter. This type using third port for active power decoupling stores the surplus energy and supplies sufficient energy to grid. Conventional decoupling circuit is applied in single phase grid connected micro-inverter especially single-stage configuration like flyback-type DC-AC inverter. In this passive power decoupling method, electrolytic capacitor with large capacitance is needed for decoupling from constant DC power and instantaneous AC power. However the decoupling capacitor is replaced with film capacitor by using APD, thus the overall system can achieve smaller size and long lifespan. Proposed three-port flyback inverter is verified by design and simulation.

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벅-타입 능동 전력 디커플링을 위한 가변 스텝을 적용한 최적 보상 이득 알고리즘 (The Optimal Compensation Gain Algorithm Using Variable Step for Buck-type Active Power Decoupling Circuits)

  • 백기호;김승권;박성민
    • 전력전자학회논문지
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    • 제23권2호
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    • pp.121-128
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    • 2018
  • This work proposes a simple control method of a buck-type active power decoupling circuit that can minimize the ripple values in the dc link voltage. The proposed method utilizes a simplified duty calculation method and an optimal compensation gain tracking algorithm with variable-step approach. Thus, the dc link voltage ripple can be effectively reduced through the proposed method along with rapid response in tracking the optimum compensation gain. Moreover, the proposed method has better dynamic responses in the load fluctuation or abnormal situation. MATLAB/Simulink simulation and hardware-in-the-loop-simulation(HILS)-based experimental results are presented to validate the effectiveness of the proposed control method.

반복제어기를 적용한 Active Power Decoupling 회로를 갖는 Boost Type PFC 정류기 (Boost Type PFC Rectifier with Active Power Decoupling Circuit with Repetitive Controller)

  • 황덕환;이정용;조영훈;최규하
    • 전력전자학회논문지
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    • 제23권6호
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    • pp.389-396
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    • 2018
  • This study proposes a control method using a repetitive controller for a boost-type PFC rectifier with an APD circuit structure to improve the current distortion caused by DCM condition. Conventional proportional integral controllers have bandwidth limitations in DCM conditions. The performance improvement of the APD controller in the DCM region is verified through simulations and experiments on the compensation of harmonics by the repetitive controller.

수동 전력 비동조화가 가능한 QAB 컨버터의 분석과 설계에 관한 연구 (Analysis and Design of Quadruple-Active-Bridge Converter Employing Passive Power Decoupling Capability)

  • 윤창우;이준영;백주원;정지훈
    • 전력전자학회논문지
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    • 제27권2호
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    • pp.157-164
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    • 2022
  • This study proposes an enhanced quadruple-Active-Bridge (QAB) converter that can solve power coupling problems. By adopting a multiple winding transformer, the equivalent circuit of a conventional QAB converter has power couplings between arbitrary output ports. This coupling is an unintended power relationship that complicates the regulation of output voltage of the multiple ports. The proposed converter can carry out power decoupling by changing the arrangement of the coupling inductor. Power transfer equations for the proposed converter and its operating principles are analyzed in detail. The power coupling caused by the transformer's leakage inductance is verified by using a proposed coupling factor that presents the relationship between inductance ratio and coupling power. In addition, the decoupling power control performance of the proposed converter is verified by simulation and a 3 kW prototype converter.

낮은 입력 정재파비와 잡음을 갖는 수동 및 능동 바이어스를 사용한 저잡음증폭기에 관한 연구 (LNA Design Uses Active and Passive Biasing Circuit to Achieve Simultaneous Low Input VSWR and Low Noise)

  • 전중성
    • Journal of Advanced Marine Engineering and Technology
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    • 제32권8호
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    • pp.1263-1268
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    • 2008
  • In this paper, the low noise power amplifier for GaAs FET ATF-10136 is designed and fabricated with active bias circuit and self bias circuit. To supply most suitable voltage and current, active bias circuit is designed. Active biasing offers the advantage that variations in the pinch-off voltage($V_p$) and saturated drain current($I_{DSS}$) will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets a gate-source voltage($V_{gs}$) for the desired drain voltage and drain current. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA, suitable for input stage matching and gate source bias. The LNA is fabricated on FR-4 substrate with active and self bias circuit, and integrated in aluminum housing. As a results, the characteristics of the active and self bias circuit LNA implemented more than 13 dB and 14 dB in gain, lower than 1 dB and 1.1 dB in noise figure, 1.7 and 1.8 input VSWR at normalized frequency $1.4{\sim}1.6$, respectively.

전력 디커플링 기능을 가진 단상 계통연계 전압형 인버터 (Single Phase Grid Connected Voltage-ed Inverter Utilizing a Power Decoupling Function)

  • 이상욱;문상필;박한석
    • 전기학회논문지P
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    • 제66권4호
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    • pp.236-241
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    • 2017
  • This paper presents a single-phase grid connected voltage-ed inverter with a power decoupling circuit. In the single-phase grid connected voltage-ed inverter, it is well known that a power pulsation with twice the grid frequency is contained in the input power. In a conventional voltage type inverter, electrolytic capacitors with large capacitance have been used in order to smooth the DC voltage. However, lifetime of those capacitors is shortened by the power pulsation with twice grid frequency. The authors have been studied a active power decoupling(APD) method that reduce the pulsating power on the input DC bus line, this enables to transfer the ripple energy appeared on the input DC capacitors into the energy in a small film capacitor on the additional circuit. Hence, extension of the lifetime of the inverter can be expected because the small film capacitor substitutes for the large electrolytic capacitors. Finally, simulation and experimental results are discussed.

낮은 직류 링크 커패시턴스를 갖는 승압형 PFC 정류기를 위한 Active Power Decoupling 회로 구현에 관한 연구 (A Study on Implementation of Active Power Decoupling Circuit for Boost Type PFC Rectifier with Low DC Link Capacitance)

  • 황덕환;이정용;조영훈;최규하
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2017년도 전력전자학술대회
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    • pp.246-247
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    • 2017
  • 단상 ac/dc, dc/ac 시스템의 경우, ac와 dc사이의 전력 불균형으로 인해 double line frequency ripple power가 발생한다. 이는 harmonic disturbance을 야기시킨다. 일반적으로 전력 리플을 줄이기 위하여 dc-link에 용량이 큰 전해 커패시터를 사용하는데, 용량이 큰 전해 커패시터는 높은 equivalent series resistance(ESR)을 가지며, 상대적으로 짧은 수명을 갖는 한계를 갖는다. 본 논문은 active power decoupling을 추가함으로써 전해 커패시터를 용량이 작은 필름 커패시터로 대체한 회로 구조를 제시한다. 그리고 dc-link 커패시터 선정방법, 설계한 제어기의 성능과 부하 변동에 따른 실험을 PSIM 시뮬레이션으로 확인하고 실험을 통해 검증한다.

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