• Journal of electromagnetic engineering and science
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• v.17 no.4
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• pp.181-185
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• 2017

In this paper, we propose an angle-of-arrival (AoA)-based local positioning system using a time-modulated array (TMA). The proposed system can determine a two-dimensional position using only two TMAs without any synchronization between the two receivers. The hardware for the proposed system consists of two commercial monopole antennas, a self-designed switch, and a well-known software-defined radio receiver. Furthermore, the location can be simply estimated in real time without the need for complicated positioning algorithms such as the MUSIC and ESPRIT algorithms. In order to evaluate the performance of our system, we estimated the position of the wireless node in an office environment. The position was estimated with a mean error of less than 0.1 m. We therefore believe that our system is appropriate for various wireless local positioning applications.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.1
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• pp.42-50
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• 2016

Recently, researches about the communication between LED array and the camera (alias 'Visual-MIMO'), have been actively conducted, and the application to the vehicle and a smart phone is expected to be maximized. Since the bit error may occur if the ISI is severe in a LED array, it is necessary to switch from the multiplexing to the diversity mode. In this paper, according to the use or not of a reference array pattern, a method for determining the transition time to the diversity mode is suggested and verified. When using the reference pattern, it determines the transition time to the diversity mode from the multiplexing using the brightness information of the received image. If the reference array pattern is not used, the size of LED array compared to the entire image according to the distance is used and the size of the LED array at the distance of a severe ISI may be used for the determination of transition time to the diversity. Finally, the proposed method is verified through the simulation and hardware experiments as well as by analyzing the performance in accordance with the ISI level and the distance.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.8
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• pp.409-413
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• 2001

In the electron-gun of CRT, the Mo-tip FEA was employed as cold cathode in order to replace the conventional thermal cathode. The Mo-tip FEA was designed and fabricated according to CRT specification and mounted on the electron-gun. It was known that fabricated cold cathode electron-gun showed better performance in terms of maximum emission current and switch-on time when compared with the ones of thermal cathode electron-gun, but some geometrical structures in the inside of electron-gun must be changed to reduce the gate leakage current. Finally, the potential applicability was guaranteed by means of operating the 19 inch-sized LG-color CRT using the fabricated cold cathode electron-gun.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.1
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• pp.46-49
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• 1986

A 32x32 liquid crystal (LC) flat panel display using two-dimensional array of PMOS switches and capacitors is designed and fabricated. Standard PMOS process was followed to fabricate the switch and capacitor array on silicon wafer, on the top of which guest-host effect liquid crystal was wmployed as an electro-optical material for optical switching and liquid crystal display(LCD) with its external drive circuitry was basically successful. Remaining problems to be solved are improvement of contrast ratio, good surface alignment and uniformity.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.8
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• pp.172-177
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• 2014

We present on a threshold switching device based on AsGeTeSi material which is significantly improved by two $N_2$ processes: reactive $N_2$ during deposition, and $N_2$ plasma hardening. The introduction of N2 in the two-step processing enables a stackable and thermally stable device structure, is allowing integration of switch and memory devices for application in nano scale array circuits. Despite of its good threshold switching characteristics, AsTeGeSi-based switches have had key issues with reliability at a high temperature to apply resistive memory. This is usually due to a change in a Te concentration. However, our chalconitride switches(AsTeGeSiN) show high temperature stability as well as high current density over $1.1{\times}10^7A/cm^2$ at $30{\times}30(nm^2)$ celll. A cycling performance of the switch was over $10^8$ times. In addition, we demonstrated a memory cell consisted of 1 switch-1 resistor (1S-1R) stack structure using a TaOx resistance memory with the AsTeGeSiN select device.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.3
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• pp.308-315
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• 2002

In this paper, the 5-bit digital phase shiftier with 10 InGaAs HEMTs is designed and fabricated for U.S. mobile DBS receiving active phased array antenna system in 12 GHz band. 11.25 $^{\circ}$, 22.5$^{\circ}$ and 45$^{\circ}$ phase bits are designed in leaded-line type. 90$^{\circ}$ and 180$^{\circ}$ phase bits are designed in reflection type combined with ring hybrid. The return loss more than 17.5 ㏈, insertion louts less than 7.8 ㏈, and maximum phase error of $\pm$6$^{\circ}$for 32 phase responses are measured in 12.2 GHz~ 12.7 GHz band.

• Convergence Security Journal
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• v.17 no.2
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• pp.41-51
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• 2017

The explosive increase in the range of Internet usage gradually makes the speed and capacity of network high-speed, rapidly evolving it into mass storage. Accordingly, network equipment such as switch and router are coping with it through hardware-based rapid technological evolution, but as the technological development of the most basic and essential network security system in the hyper-connected society requires frequent alterations and updates about the security issues and signatures of tens of thousands, so it is not easy to overcome the technical limitations based on the software. In this paper, to improve problems in installing and operating such anti-DDoS devices, we propose a Hi-DPI algorithm best reflecting the hardware characteristics and parallel processing characteristics of FPGA (Field Programmable Gate Array), and would verify the practicality.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.2
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• pp.355-358
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• 2010

As CMOS technology continues to scale down, signal processing is favorably done in the digital domain, which requires Analog-to-Digital (A/D) Converter to be integrated on-chip. This paper presents a design methodology of 12-bit 1-MS/s Rail-to-Rail fully differential SAR ADC using Deep N-well Switch based on binary search algorithm. Proposed A/D Converter has the following architecture and techniques. Firstly, chip size and power consumption is reduced due to split capacitor array architecture and charge recycling method. Secondly, fully differential architecture is used to reduce noise between the digital part and converters. Finally, to reduce the mismatch effect and noise error, the circuit is designed to be available for Rail-to-Rail input range using simple Deep N-well switch. The A/D Converter fabricated in a TSMC 0.18um 1P6M CMOS technology and has a Signal-to-Noise-and-Distortion-Ratio(SNDR) of 69 dB and Free-Dynamic-Range (SFDR) of 73 dB. The occupied active area is $0.6mm^2$.

• Journal of Power Electronics
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• v.15 no.1
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• pp.131-145
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• 2015

The voltage-source inverters (VSI) supplying a motor drive are prone to open transistor faults. To address this issue in fault-tolerant drives applicable to electric vehicles, a new open transistor fault diagnosis (FD) method is presented in this paper. According to the proposed method, in order to define the FD index, the phase angle of the converter output current is estimated by a simple trigonometric function. The proposed FD method is adaptable, simple, capable of detecting multiple open switch faults and robust to load operational variations. Keeping the FD in mind as a mandatory part of the fault tolerant control algorithm, the FD block is applied to a five-phase converter supplying a multiphase fault-tolerant PM motor drive with non-sinusoidal unbalanced current waveforms. To investigate the performance of the FD technique, the fault-tolerant sliding mode control (SMC) of a five-phase brushless direct current (BLDC) motor is developed in this paper with the embedded FD block. Once the theory is explained, experimental waveforms are obtained from a five-phase BLDC motor to show the effectiveness of the proposed FD method. The FD algorithm is implemented on a field programmable gate array (FPGA).

• ETRI Journal
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• v.41 no.4
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• pp.536-548
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• 2019

In this study, an electronically steerable parasitic array radiator (ESPAR) antenna via analog radio frequency (RF) switches for a single RF chain MIMO system is presented. The proposed antenna elements are spaced at ${\lambda}/64$, and the antenna size is miniaturized via a dielectric radome. The optimum reactance load value is calculated via the beamforming load search algorithm. A switch simplifies the design and implementation of the reactance loads and does not require additional complex antenna matching circuits. The measured impedance bandwidth of the proposed ESPAR antenna is 1,500 MHz (1.75 GHz-3.25 GHz). The proposed antenna exhibits a beam pattern that is reconfigurable at 2.48 GHz due to changes in the reactance value, and the measured peak antenna gain is 4.8 dBi. The reception performance is measured by using a $4{\times}4$ BPSK signal. The measured average SNR is 17 dB when using the proposed ESPAR antenna as a transmitter, and the average SNR is 16.7 dB when using a four-conventional monopole antenna.