• ETRI Journal
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• v.29 no.3
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• pp.259-269
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• 2007

The ubiquitous flexible operating system (UbiFOS) is a real-time operating system designed for cost-conscious, low-power, small to medium-sized embedded systems such as cellular phones, MP3 players, and wearable computers. It offers efficient real-time operating system services like multi-task scheduling, memory management, inter-task communication and synchronization, and timers while keeping the kernel size to just a few to tens of kilobytes. For flexibility, UbiFOS uses various task scheduling policies such as cyclic time-slice (round-robin), priority-based preemption with round-robin, priority-based preemptive, and bitmap. When there are less than 64 tasks, bitmap scheduling is the best policy. The scheduling overhead is under 9 ${\mu}s$ on the ARM926EJ processor. UbiFOS also provides the flexibility for user to select from several inter-task communication techniques according to their applications. We ported UbiFOS on the ARM9-based DVD player (20 kB), the Calm16-based MP3 player (under 7 kB), and the ATmega128-based ubiquitous sensor node (under 6 kB). Also, we adopted the dynamic power management (DPM) scheme. Comparative experimental results show that UbiFOS could save energy up to 30% using DPM.

• Journal of Korea Multimedia Society
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• v.6 no.7
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• pp.1189-1199
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• 2003

This paper presents a new method for the motion detection of vehicles using hierarchical motion estimation and parallel processing. It captures the road image by using a CMOS sensor. It divides the captured image into small blocks and detects the motion of each block by using a block-matching method which is based on a hierarchical motion estimation and parallel processing for the real-time processing. The parallelism is achieved by using tile pipeline and the data flow technique. The proposed method has been implemented by using an embedded system. The proposed block matching algorithm has been implemented on PLDs(Programmable Logic Device) and clustering algorithm has been implemented by ARM processor. Experimental results show that the proposed system detects the motion of vehicles in real-time.

• The Journal of the Korea Contents Association
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• v.9 no.2
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• pp.27-35
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• 2009

In this paper, we present result of embedded system based H.264/SVC decoder circuit design and system implementation. To deal with the standardized H.264/SVC functionalities, the presented SVC decoder system is consist of hardware engine design and software with ARM core processor. In order to improve the feasibility and applicability, and reduce the decoder complexity, the implemented system is constructed with only the consideration of IPPP structure scalability without using the full B-picture architecture. Finally, we will show the decoding image result using the designed H.264/SVC decoder system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.10 s.352
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• pp.126-133
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• 2006

This paper describes an AMBA-based IP to perform forward and inverse transform and quantization required in the H.264 video compression standard. The transform and quantization circuit was optimized for area and performance. The AHB wrapper was added to the circuit for the AMBA-based operation. The user of the IP can specify how long the bus may be occupied by the IP and also where the video data are stored in the external memory. The function of the proposed IP based on AMBA Specification was verified on the platform board with Xilinx FPGA and ARM9 processor. We fabricated an MPW chip using $0.25{\mu}m$ standard cells and observed its correct operations on silicon.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.5B
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• pp.286-294
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• 2007

In ASIP design, compiler is required for performance evaluation of processors being designed. The design of machine specific compiler is time consuming. This paper presents the system which generates C compiler from MDL descriptions. Compiler generation using MDL can support user retargetability and concurrency between compiler design and processor design. However, it must overcome semantics gap between compiler and machine. To handle this problem, the proposed system maps behavioral descriptions to library which contains abstract behavior for each tree pattern. Using mapped instructions and information on register file usage, the proposed system generates back-end interface function of the compiler. Generated compilers, for MIPS R3000, ARM9 cores, have been proved by application programs written in C code.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.6
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• pp.851-858
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• 2012

In this paper, we design a seismic data acquisition system(SDAS) and implement it. This system is essential for development of a noble local earthquake disaster preventing system in population center. In the system, we choose a proper MEMS-type triaxial accelerometer as a sensor, and FPGA and ARM processor are used for implementing the system. In the SDAS, each module is realized by Verilog HDL and C Language. We carry out the ModelSim simulation to verify the performances of important modules. The simulation results show that the FPGA-based data acquisition module can guarantee an accurate time-synchronization for the measured data from each axis sensor. Moreover, the FPGA-ARM based embedded technology in system hardware design can reduce the system cost by the integration of data logger, communication sever, and facility control system. To evaluate the data acquisition performance of the SDAS, we perform experiments for real seismic signals with the exciter. Performances comparison between the acquired data of the SDAS and the reference sensor shows that the data acquisition performance of the SDAS is valid.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.10C
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• pp.1042-1050
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• 2007

This paper describes the system which automatically generates power-minimized embedded cores from MDL descriptions. An automatic generation system is constructed which generated embedded cores which consumes less power for application programs. From the usage information on pipeline stages for each instruction, the proposed system generates embedded cores with the capability of detecting/resolving pipeline hazards. The generated cores are configured such that the power consumption is minimized. The proposed system has been tested by generating HDL codes for ARM9, MIPS R3000 architectures. Experimental results show functional accuracy of the generated cores, and show that power reduction of $20%{\sim}40%$ has been observed for benchmark programs.

• Journal of KIISE:Computer Systems and Theory
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• v.33 no.9
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• pp.642-649
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• 2006

In order to recognize a situation from a environment which provides an intelligent service, we propose state-transition based situation modeling which is suitable for a low computing power and restricted resources like embedded systems, and we designed its application to a situation-action converter(SAC)which is consist of two parts; situation detector recognized wanted situations and action generator generated various control actions. Then, we implemented a situation manager for smart scheduler service by using a SAC which is installed to a ARM processor based embedded Linux evaluation board.

• Journal of the Korean Institute of Intelligent Systems
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• v.17 no.3
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• pp.368-373
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• 2007

In recent year s there have been increasing interests in real-time object tracking with image information. This dissertation presents a real-time object tracking method through the object recognition based on neural networks that have robust characteristics under various illuminations. This dissertation proposes a global search and a local search method to track the object in real-time. The global search recognizes a target object among the candidate objects through the entire image search, and the local search recognizes and track only the target object through the block search. This dissertation uses the object color and feature information to achieve fast object recognition. The experiment result shows the usefulness of the proposed method is verified.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2018.10a
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• pp.538-539
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• 2018

This paper summarizes the implementation of lane recognition using OpenCV, one of the open source computer vision libraries. The Linux operating system Rasbian(r18.03.13) was installed on the ARM processor-based Raspberry Pi 3 board, and Raspberry Pi Camera was used for image processing. In order to realize the lane recognition, Canny Edge Detection and Hough Transform algorithm implemented in OpenCV library was used and RANSAC algorithm was used to prevent shaking of vanishing point and to detect only the desired straight line. In addtion, the DC motor and the Servo motor were controlled so that the vehicle would run according to the detected lane.