• ETRI Journal
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• v.42 no.4
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• pp.491-504
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• 2020

We present AB9, a neural processor for inference acceleration. AB9 consists of a systolic tensor core (STC) neural network accelerator designed to accelerate artificial intelligence applications by exploiting the data reuse and parallelism characteristics inherent in neural networks while providing fast access to large on-chip memory. Complementing the hardware is an intuitive and user-friendly development environment that includes a simulator and an implementation flow that provides a high degree of programmability with a short development time. Along with a 40-TFLOP STC that includes 32k arithmetic units and over 36 MB of on-chip SRAM, our baseline implementation of AB9 consists of a 1-GHz quad-core setup with other various industry-standard peripheral intellectual properties. The acceleration performance and power efficiency were evaluated using YOLOv2, and the results show that AB9 has superior performance and power efficiency to that of a general-purpose graphics processing unit implementation. AB9 has been taped out in the TSMC 28-nm process with a chip size of 17 × 23 ㎟. Delivery is expected later this year.

• Journal of the Korea Convergence Society
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• v.10 no.11
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• pp.95-100
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• 2019

In this paper, autonomous vehicles of service with existing vehicle accident for the prevention of the vehicle communication technology, self-driving techniques, brakes automatic control technology, artificial intelligence technologies such as well and developed the vehicle accident this occur to death or has been techniques, can prepare various safety cases intended to minimize the injury. In this paper, it is a study to secure safety in autonomous vehicles. This is determined according to spatial factors such as chip signals for general low-power short-range wireless communication and micro road AI. On the other hand, in this paper, the safety of boarding is improved by checking the signal from the electronic chip, up to "recognition of the emotion from residence time in the sensing area" to the biological electronic chip. As a result of demonstrating the reliability of the world countries the world, inducing safety autonomous system of all passengers in terms of safety. Unmanned autonomous vehicle riding and commercialization will lead to AI systems and biochips (Verification), linked IoT on the road in the near future, and the safety technology reliability of the world will be highlighted.

• Resources Recycling
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• v.4 no.1
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• pp.25-30
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• 1995

In the preparatIon of reclaimed aluminium lllgot from alumimum scrap, the aluminium recovery was studied a as a function of the preliminary treatment of samples, addition of flux and melting atmosphere. AI dross is produced by an oxidation reaction at the surface of liquid metal. The recovery of AI metal increases u up to maximum 95% by adding salt up to 7%, The recovery of AI metal in the compacted chip bale without oil removal mcrease about 14% compared io non-compacted chip. In the case of the AI seed melting process, the recovery of Al metal of the crushed and compacted chip hale is 97%, In meltmg of alumimum scrap under the atmosphere of carbon and nitrogen gas, the recovery of AI metal increase, but it is decreased when the mixture of salt and carbon powder is added excessively.

• ETRI Journal
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• v.42 no.6
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• pp.943-950
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• 2020

We propose 8.2-GHz band radar RFICs for an 8 × 8 phased-array frequency-modulated continuous-wave receiver developed using 65-nm CMOS technology. This receiver panel is constructed using a multichip solution comprising fabricated 2 × 2 low-noise amplifier phase-shifter (LNA-PS) chips and a 4ch RX front-end chip. The LNA-PS chip has a novel phase-shifter circuit for low-voltage operation, novel active single-to-differential/differential-to-single circuits, and a current-mode combiner to utilize a small area. The LNA-PS chip shows a power gain range of 5 dB to 20 dB per channel with gain control and a single-channel NF of 6.4 dB at maximum gain. The measured result of the chip shows 6-bit phase states with a 0.35° RMS phase error. The input P1 dB of the chip is approximately -27.5 dBm at high gain and is enough to cover the highest input power from the TX-to-RX leakage in the radar system. The gain range of the 4ch RX front-end chip is 9 dB to 30 dB per channel. The LNA-PS chip consumes 82 mA, and the 4ch RX front-end chip consumes 97 mA from a 1.2 V supply voltage. The chip sizes of the 2 × 2 LNA-PS and the 4ch RX front end are 2.39 mm × 1.3 mm and 2.42 mm × 1.62 mm, respectively.

• Asia pacific journal of information systems
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• v.34 no.1
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• pp.150-190
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• 2024

This article proposes a framework to elucidate the structural dynamics of the generative AI ecosystem. It also outlines the practical application of this proposed framework through illustrative policies, with a specific emphasis on the development of the Korean generative AI ecosystem and its implications of platform strategies at AI platform-squared. We propose a comprehensive classification scheme within generative AI ecosystems, including app builders, technology partners, app stores, foundational AI models operating as operating systems, cloud services, and chip manufacturers. The market competitiveness for both app builders and technology partners will be highly contingent on their ability to effectively navigate the customer decision journey (CDJ) while offering localized services that fill the gaps left by foundational models. The strategically important platform of platforms in the generative AI ecosystem (i.e., AI platform-squared) is constituted by app stores, foundational AIs as operating systems, and cloud services. A few companies, primarily in the U.S. and China, are projected to dominate this AI platform squared, and consequently, they are likely to become the primary targets of non-market strategies by diverse governments and communities. Korea still has chances in AI platform-squared, but the window of opportunities is narrowing. A cautious approach is necessary when considering potential regulations for domestic large AI models and platforms. Hastily importing foreign regulatory frameworks and non-market strategies, such as those from Europe, could overlook the essential hierarchical structure that our framework underscores. Our study suggests a clear strategic pathway for Korea to emerge as a generative AI powerhouse. As one of the few countries boasting significant companies within the foundational AI models (which need to collaborate with each other) and chip manufacturing sectors, it is vital for Korea to leverage its unique position and strategically penetrate the platform-squared segment-app stores, operating systems, and cloud services. Given the potential network effects and winner-takes-all dynamics in AI platform-squared, this endeavor is of immediate urgency. To facilitate this transition, it is recommended that the government implement promotional policies that strategically nurture these AI platform-squared, rather than restrict them through regulations and stakeholder pressures.

• Electronics and Telecommunications Trends
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• v.36 no.3
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• pp.1-11
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• 2021

In this study, we analyze the automotive chip ecosystem that recently caused the global supply shortage, and attempt to derive policy implications for us from the conclusion. Automotive chips are critical parts that control various systems so that a vehicle can drive itself or operate with electricity. The current shortage in supply and demand for automotive chips is due to the inconsistency between supply and demand between automotive chip companies and car manufacturers. To promote the automotive chip industry, new investment incentives, tax cuts, and human resource training are needed.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2022.11a
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• pp.388-389
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• 2022

Recently, AI (Artificial Intelligence) has been applied to various technologies such as automatic driving, robot and smart communication. Currently, AI system is developed by software-based method using tensor flow, and GPU (Graphic Processing Unit) is employed for processing unit. However, if software-based method employing GPU is used for AI applications, there is a problem that we can not change the internal circuit of processing unit. In this method, if high-level jobs are required for AI system, we need high-performance GPU, therefore, we have to change GPU or graphic card to perform the jobs. In this work, we developed a CNN-based FPGA (Field Programmable Gate Array) chip to solve this problem.

• ETRI Journal
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• v.42 no.4
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• pp.480-490
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• 2020

More than 42 000 fires occur nationwide and cause over 2500 casualties every year. There is a lack of specialized equipment, and rescue operations are conducted with a minimal number of apparatuses. Through-the-wall radars (TTWRs) can improve the rescue efficiency, particularly under limited visibility due to smoke, walls, and collapsed debris. To overcome detection challenges and maintain a small-form factor, a TTWR system-on-chip (SoC) and its architecture have been proposed. Additive reception based on coherent clocks and reconfigurability can fulfill the TTWR demands. A clock-based single-chip infrared radar transceiver with embedded control logic is implemented using a 130-nm complementary metal oxide semiconductor. Clock signals drive the radar operation. Signal-to-noise ratio enhancements are achieved using the repetitive coherent clock schemes. The hand-held prototype radar that uses the TTWR SoC operates in real time, allowing seamless data capture, processing, and display of the target information. The prototype is tested under various pseudo-disaster conditions. The test standards and methods, developed along with the system, are also presented.

• ETRI Journal
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• v.44 no.5
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• pp.859-874
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• 2022

This paper presents a low-power and lightweight human body communication (HBC) receiver with an embedded dummy electrode for improved signal acquisition. The clock data recovery (CDR) circuit in the receiver operates with a low supply voltage and utilizes a clock phase inversion scheme. The receiver is equipped with a main electrode and dummy electrode that strengthen the capacitive-coupled signal at the receiver frontend. The receiver CDR circuit exploits a clock inversion scheme to allow 0.9-V operation while achieving a shorter lock time than at 3.3-V operation. In experiments, a receiver chip fabricated using 130-nm complementary metal-oxide-semiconductor technology was demonstrated to successfully receive the transmitted signal when the transmitter and receiver are placed separately on each hand of the user while consuming only 4.98 mW at a 0.9-V supply voltage.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.38-47
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• 2023

Three dimensional (3D) packaging is a next-generation packaging technology that vertically stacks chips such as memory devices. The necessity of 3D packaging is driven by the increasing demand for smaller, high-performance electronic devices (HPC, AI, HBM). Also, it facilitates innovative applications across another fields. With growing demand for high-performance devices, companies of semiconductor fields are trying advanced packaging techniques, including 2.5D and 3D packaging, MR-MUF, and hybrid bonding. These techniques are essential for achieving higher chip integration, but challenges in mass production and fine-pitch bump connectivity persist. Advanced bonding technologies are important for advancing the semiconductor industry. In this review, it was described 3D packaging technologies for chip integration including mass reflow, thermal compression bonding, laser assisted bonding, hybrid bonding.