• 제목/요약/키워드: AES Algorithm

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Design and Implementation of Public key-based Video Conference System for Authentication and Encryption (공개키기반 사용자인증과 암호화를 적용한 영상회의 시스템 설계 및 구현)

  • Jung Yong-Deug;Lee Sang-Hun;Jin Moon-Seog
    • The KIPS Transactions:PartC
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    • v.11C no.7 s.96
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    • pp.971-980
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    • 2004
  • This paper describes the design and implementation of the video conferencing system using public key infrastructure which is used for user authentication and encryption. Public key infrastructure reinforces the authentication process for conference participant, and the symmetric key system blocks malicious access to information and protect conference control information. This paper shows the implementation of the trans portation layer secure protocol in conformity with Korea public key authentication algorithm standard and symmetric encryption algorithm (DES, 3DES and AES) for media stream encryption. In this paper, we deal with two ways of protecting information : transportation layer secure protocol secures user authentication process and the conference control information; while public key-based authentication system protects personal information of users when they connect to the network. When distributing the session keys for encryption, Internet Key Exchange is used for P2P communication, and secure protocol is employed for 1 : N multi-user communication in the way of distributing the public key-based en-cryption key.

Performance Evaluation of Motorcycle's Anti-theft Device using NFC Authentication and Solenoid Valve (NFC 보안인증과 솔레노이드 밸브를 이용한 이륜차 이동제한장치 성능평가)

  • Moon, Boram;Jin, Taeseok
    • Journal of the Korean Institute of Intelligent Systems
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    • v.26 no.1
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    • pp.82-86
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    • 2016
  • This paper proposes a method for the immobilization of motorbike brakes in conjunction with near-field communication (NFC) technology in order to meet the increasing demand for security and convenience of motorbike drivers. We thought about the concept of wireless key, NFC security devices and automatic solenoid valve for setting the lock and unlock module. This paper propose the design and development of an innovative anti-theft alarm system for motorcycles using NFC smart devices based on RFID system, the basis of IoT and AES(advanced encryption standard) encryption Algorithm. The design concept is based on NFC communication strategy between the vehicle and owner. To do this concept, we designed motorcycle smart key system with general-purpose NFC system and the automatic solenoid valve for setting the lock and unlock module. First, we designed control unit and NFC card reader for motorcycle smart key system. Then we propose an AES encryption algorithm and prove that the motorcycle key system is controllable by showing the result of implementing and testing, after installing.

Frequency Domain Acoustic Echo Suppression Based on Boundary Condition (주파수 영역에서 구간조건을 이용한 음향학적 반향 제거)

  • Lee, Kyu-Ho;Chang, Joon-Hyuk
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.46 no.5
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    • pp.162-166
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    • 2009
  • In this paper, we propose a novel approach of an acoustic echo cancellation (AEC) algorithm which is differently adopted in the relevant period condition by the suppression parameter of a parametric wiener filter (PWF). The PWF uses the suppression parameter to compensate uncertainty of acoustic echo signal estimation. The existing PWF method using the fixed suppression parameter derives the distortion of the near-end signal at the double-talk. To solve this problem, the boundary condition is devised using decision of the double-talk detection (DTD) algorithm and voice activity detector (VAD). The boundary condition makes it possible to treat differently depending on the case of the single-talk and double-talk. According to the experimental results, the proposed approach is found to be effective for acoustic echo cancellation using the boundary condition.

A Study on AES-based Mutual Authentication Protocol for IoT Devices (사물인터넷 디바이스를 위한 AES 기반 상호인증 프로토콜)

  • Oh, Se-Jin;Lee, Seung-Woo
    • Journal of Industrial Convergence
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    • v.18 no.5
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    • pp.23-29
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    • 2020
  • The Internet of things (IoT) is the extension of Internet connectivity into various devices and everyday objects. Embedded with electronics, Internet connectivity and other forms of hardware. The IoT poses significant risk to the entire digital ecosystem. This is because so many of these devices are designed without a built-in security system to keep them from being hijacked by hackers. This paper proposed a mutual authentication protocol for IoT Devices using symmetric-key algorithm. The proposed protocol use symmetric key cryptographic algorithm to securely encrypt data on radio channel. In addition, the secret key used for encryption is random number of devices that improves security by using variable secret keys. The proposed protocol blocked attacker and enabled legal deives to communicate because only authenticated devices transmit data by a mutual authentication protocol. Finally, our scheme is safe for attacks such as eavesdropping attack, location tracking, replay attack, spoofing attack and denial of service attack and we confirmed the safety by attack scenario.

A Security SoC supporting ECC based Public-Key Security Protocols (ECC 기반의 공개키 보안 프로토콜을 지원하는 보안 SoC)

  • Kim, Dong-Seong;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.24 no.11
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    • pp.1470-1476
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    • 2020
  • This paper describes a design of a lightweight security system-on-chip (SoC) suitable for the implementation of security protocols for IoT and mobile devices. The security SoC using Cortex-M0 as a CPU integrates hardware crypto engines including an elliptic curve cryptography (ECC) core, a SHA3 hash core, an ARIA-AES block cipher core and a true random number generator (TRNG) core. The ECC core was designed to support twenty elliptic curves over both prime field and binary field defined in the SEC2, and was based on a word-based Montgomery multiplier in which the partial product generations/additions and modular reductions are processed in a sub-pipelining manner. The H/W-S/W co-operation for elliptic curve digital signature algorithm (EC-DSA) protocol was demonstrated by implementing the security SoC on a Cyclone-5 FPGA device. The security SoC, synthesized with a 65-nm CMOS cell library, occupies 193,312 gate equivalents (GEs) and 84 kbytes of RAM.

A New Unified System of Acoustic Echo and Noise Suppression Incorporating a Novel Noise Power Estimation (새로운 잡음전력 추정 기법을 적용한 음향학적 반향 및 배경잡음 제거 통합시스템)

  • Park, Yun-Sik;Chang, Joon-Hyuk
    • The Journal of the Acoustical Society of Korea
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    • v.28 no.7
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    • pp.680-685
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    • 2009
  • In this paper, we propose a efficient noise power estimation technique for an integrated acoustic echo and noise suppression system in a frequency domain. The proposed method uses speech absence probability (SAP) derived from the microphone input signal as the smoothing parameter updating noise power to reduce the noise power estimation error resulted from the distortions in the unified structure where the noise suppression (NS) operation is placed after the acoustic echo suppression (AES) algorithm. Therefore, in the proposed approach, the smoothing parameter based on SAP derived from the input signal instead of echo-suppressed signal should stop updating noise power estimates during the distorted noise spectrum periods. The performance of the proposed algorithm is evaluated by the objective test under various environments and yields better results compared with the conventional scheme.

Fast Stream Cipher AA32 for Software Implementation (소프트웨어 구현에 적합한 고속 스트림 암호 AA32)

  • Kim, Gil-Ho;Park, Chang-Soo;Kim, Jong-Nam;Cho, Gyeong-Yeon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.6B
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    • pp.954-961
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    • 2010
  • Stream cipher was worse than block cipher in terms of security, but faster in execution speed as an advantage. However, since so far there have been many algorithm researches about the execution speed of block cipher, these days, there is almost no difference between them in the execution speed of AES. Therefore an secure and fast stream cipher development is urgently needed. In this paper, we propose a 32bit output fast stream cipher, AA32, which is composed of ASR(Arithmetic Shifter Register) and simple logical operation. Proposed algorithm is a cipher algorithm which has been designed to be implemented by software easily. AA32 supports 128bit key and executes operations by word and byte unit. As Linear Feedback Sequencer, ASR 151bit is applied to AA32 and the reduction function is a very simple structure stream cipher, which consists of two major parts, using simple logical operations, instead of S-Box for a non-linear operation. The proposed stream cipher AA32 shows the result that it is faster than SSC2 and Salsa20 and satisfied with the security required for these days. Proposed cipher algorithm is a fast stream cipher algorithm which can be used in the field which requires wireless internet environment such as mobile phone system and real-time processing such as DRM(Digital Right Management) and limited computational environments such as WSN(Wireless Sensor Network).

Hardware Implementation of 128-bit Cipher Algorithm Using FPGA (FPGA를 이용한 128-비트 암호 알고리듬의 하드웨어 구현)

  • Lee, Geon-Bae;Lee, Byeong-Uk
    • The KIPS Transactions:PartC
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    • v.8C no.3
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    • pp.277-286
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    • 2001
  • 본 논문에서는 미국 국립표준기술연구소 차세대 표준 암호 알고리듬으로 선정한 Rijndael 암호 알고리듬과 안정성과 성능에서 인정을 받은 Twofish 암호 알고리듬을 ALTERA FPGA를 사용하여 하드웨어로 구현한다. 두가지 알고리듬에 대해 키스케쥴링과 인터페이스를 하드웨어에 포함시켜 구현한다. 알고리듬의 효율적인 동작을 위해 키스케쥴링을 포함하면서도 구현된 회로의 크기가 크게 증가하지 않으며, 데이터의 암호/복호화 처리 속도가 향상됨을 알 수 있다. 주어진 128-비트 대칭키에 대하여, 구현된 Rijndael 암호 알고리듬은 11개의 클럭 만에 키스케쥴링을 완료하며, 구현된 Twofish 암호 알고리듬은 21개의 클럭 만에 키스케쥴링을 완료한다. 128-비트 입력 데이터가 주어졌을 때, Rijndael의 경우, 10개의 클럭 만에 주어진 데이터의 암호/복호화를 수행하고, Twofish는 16개의 클럭 만에 암호/복호화를 수행한다. 또한, Rijndael은 336.8Mbps의 데이터 처리속도를 보이고, Twofish는 121.2Mbps의 성능을 보임을 알 수 있다.

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Low Power Implementation of Integrated Cryptographic Engine for Smart Cards (스마트카드 적용을 위한 저전력 통합 암호화 엔진의 설계)

  • Kim, Yong-Hee;Jeong, Yong-Jin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.6
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    • pp.80-88
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    • 2008
  • In this paper, the block cipher algorithms, 3-DES(Triple Data Encryption Standard), AES(Advanced Encryption Standard), SEED, HASH(SHA-1), which are domestic and international standards, have been implemented as an integrated cryptographic engine for smart card applications. For small area and low power design which are essential requirements for portable devices, arithmetic resources are shared for iteration steps in each algorithm, and a two-level clock gating technique was used to reduce the dynamic power consumption. The integrated cryptographic engine was verified with ALTERA Excalbur EPXA10F1020C device, requiring 7,729 LEs(Logic Elements) and 512 Bytes ROM, and its maximum clock speed was 24.83 MHz. When designed by using Samsung 0.18 um STD130 standard cell library, the engine consisted of 44,452 gates and had up to 50 MHz operation clock speed. It was estimated to consume 2.96 mW, 3.03 mW, 2.63 mW, 7.06 mW power at 3-DES, AES, SEED, SHA-1 modes respectively when operating at 25 MHz clock. We found that it has better area-power optimized structure than other existing designs for smart cards and various embedded security systems.

Reversible Secret Sharing Scheme Using Symmetric Key Encryption Algorithm in Encrypted Images (암호화된 이미지에서 대칭키 암호화 알고리듬을 이용한 가역 비밀이미지 공유 기법)

  • Jeon, Byoung-Hyun;Shin, Sang-Ho;Jung, Ki-Hyun;Lee, Joon-Ho;Yoo, Kee-Young
    • Journal of Korea Multimedia Society
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    • v.18 no.11
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    • pp.1332-1341
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    • 2015
  • This paper proposes a novel reversible secret sharing scheme using AES algorithm in encrypted images. In the proposed scheme, a role of the dealer is divided into an image provider and a data hider. The image provider encrypts the cover image with a shared secret key and sends it to the dealer. The dealer embeds the secret data into the encrypted image and transmits encrypted shadow images to the corresponding participants. We utilize Galois polynomial arithmetic operation over 28 and the coefficient of the higher-order term is fixed to one in order to prevent the overflow. In experimental results, we demonstrate that the PSNR is sustained close to 44dB and the embedding capacity is 524,288 bits.