• Journal of KIEE
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• 제10권1호
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• pp.35-42
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• 2000

An equivalent load sharing control based on the frequency and voltage droop concept for parallel operation of two three-phase Uninterruptible Power Supply (UPS) systems with no control interconnection lines is presented in this paper. First of all, due to the use of active power and reactive power as control variables, the characteristics of output powers according to amplitude and phase differences between output voltages of two UPS systems are analyzed. Secondly, simulation results under different line impedance demonstrate the feasibility of the wireless parallel operation control. Finally, experiments are presented to verify the theoretical discussion with two three-phase 20kVA UPS systems employed TMS320C32, a kind of real time digital signal processor (DSP).

• 한국태양에너지학회:학술대회논문집
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• 한국태양에너지학회 2008년도 춘계학술발표대회 논문집
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• pp.43-48
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• 2008

Through simulations and field experiment on A.C. parallel operation of both Utility Interactive Photovoltaic System and Diesel Engine Revolving Field Type Synchronous Generator, following factors have been found. First, the inverter should be operated in three modes of frequency(mode.1: ${\pm}$0.3Hz, mode.2: ${\pm}$1Hz, mode.3: ${\pm}$2Hz) as default, considering properties of operating Synchronous Generator. Second, as a result of supplying 13.5kW of residual power, it has been found that Synchronous Generator takes the power input only as reactive power, because it was electrically stable with frequency of 60.14Hz and high voltage of 222.3V even when power factor was -0.94. Besides, it was mechanically stable, too, because the quake, noise, and temperature of Synchronous Generator in this case were 7.5mm/s, 97dB, and $6^{\circ}C$ respectively, which were lower than normal load connection of 145.6kW; 11.03mm/s. Thus, load share of Revolving Field Type Synchronous Generator reduces according to the supply of Photovoltaic System to the load power. In this experiment, 200kW of Synchronous Generator and 40kW of Photovoltaic System were operated in parallel. The load share was 20% in maximum. and 11.1lit/hr of fuel was saved.

• 전자공학회논문지C
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• 제35C권8호
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• pp.1-9
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• 1998

A new parallel test algorithm and a built-in self test (BIST) architecture are developed to test various types of functional faults efficiently in content addressable memories (CAMs). In test mode, the read oepratin is replaced by one parallel content addressable search operation and the writing operating is performed parallely with small peripheral circuit modificatins. The results whow that an efficient and practical testing with very low complexity and area overhead can be achieved.

• 전자공학회논문지C
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• 제34C권6호
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• pp.44-50
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• 1997

This paper describes the design and test of an on-line non-invasive network performance monitor (hardware portion) for the SPAX parallel computer. The SPAX parallel computer supports up to 256 intel P6 processors with 4 P6 processors constituting a processign node. The nodes are interconnected with a dual two-level crossbar network calle dXcent-net. Since the performance of the SPAX parallel computer is highly dependent on the proper and efficient operation of the network, an on-line non-invasive network performance monitor (with hardware components) has been developed to aid in the monitoring and tunign of the Xcent-net. Successful testing of a prototype node monitor board and PC interface system shows that our monitor design provides a low-cost practical solution to this problem.

• International Journal of Automotive Technology
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• 제6권5호
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• pp.529-536
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• 2005

This paper presents a novel design of a fuzzy control strategy (FCS) based on torque distribution for parallel hybrid electric vehicles (HEVs). An empirical load-regulating vehicle operation strategy is developed on the basis of analysis of the components efficiency map data and the overall energy conversion efficiency. The aim of the strategy is to optimize the fuel economy and balance the battery state-of-charge (SOC), while satisfying the vehicle performance and drivability requirements. In order to accomplish this strategy, a fuzzy inference engine with a rule-base extracted from the empirical strategy is designed, which works as the kernel of a fuzzy torque distribution controller to determine the optimal distribution of the driver torque request between the engine and the motor. Simulation results reveal that compared with the conventional strategy which uses precise threshold parameters the proposed FCS improves fuel economy as well as maintains better battery SOC within its operation range.

• 대한기계학회논문집B
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• 제36권8호
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• pp.797-802
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• 2012

본 연구에서는 두 대의 히트펌프를 이용하여 $60^{\circ}C$의 난방 공급을 하는 경우에 대하여, 병렬운전을 할 경우의 성능과 직렬운전을 할 경우의 성능을 서로 비교함으로써, 직렬운전에 의한 성능 향상 가능성을 연구하였다. 두 경우의 성능을 공정하게 비교하기 위하여, 히트펌프를 구성하는 열교환기의 전열면적을 고정하였으며, 부하측 및 열원측의 입구 유량 및 온도 조건을 고정하였다. 또한, 보다 현실적인 결과를 위하여 열교환기 내 열전달 및 압력강하 특성을 고려하였다. 시뮬레이션 결과, 직렬운전 시스템의 난방성능계수가 병렬운전 시스템의 난방성능계수에 비해 본 연구의 시뮬레이션 조건 하에서 약 5% 향상 될 수 있음을 관찰하였다.

• 전자공학회논문지C
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• 제34C권11호
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• pp.47-55
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• 1997

In general, processing flow of the conventional floating-point multiplication consists of either multiplication, addition, normalization, and rounding stage of the conventional floating-point multiplier requries a high speed adder for increment, increasing the overall execution time and occuping a large amount of chip area. A floating-point multiplier performing addition and IEEE rounding in parallel is designed by using the carry select addder used in the addition stage and optimizing the operational flow based on the charcteristics of floating point multiplication operation. A hardware model for the floating point multiplier is proposed and its operational model is algebraically analyzed in this paper. The proposed floating point multiplier does not require and additional execution time nor any high spped adder for rounding operation. Thus, performance improvement and cost-effective design can be achieved by this suggested approach.

• 전자공학회논문지C
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• 제35C권2호
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• pp.29-35
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• 1998

This paper describes architectures and design of a SIMD type parallel image processing chip called SliM-II. The chiphas a linear array of 64 processing elements (PEs), operates at 30 MHz in the worst case simulation and gives at least 1.92 GIPS. In contrast to existing array processors, such as IMAP, MGAP-2, VIP, etc., each PE has a multiplier that is quite effective for convolution, template matching, etc. The instruction set can execute an ALU operation, data I/O, and inter-PE communication simulataneously in a single instruction cycle. In addition, during the ALU/multiplier operation, SliM-II provides parallel move between the register file and on-chip memory as in DSP chips, SliM-II can greatly reduce the inter-PE communication overhead, due to the idea a sliding, which is a technique of overlapping inter-PE communication with computation. Moreover, the bandwidth of data I/O and inter-PE communication increases due to bit-parallel data paths. We used the COMPASS$^{TM}$ 3.3 V 0.6.$\mu$m standrd cell library (v8r4.10). The total number of transistors is about 1.5 muillions, the core size is 13.2 * 13.0 mm$^{2}$ and the package type is 208 pin PQ2 (Power Quad 2). The performance evaluation shows that, compared to a existing array processors, a proposed architeture gives a significant improvement for algorithms requiring multiplications.s.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.372-375
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• 2006

This paper proposes a parallel operation system of the Z-source active power filter using one fuel cells(FC) system. The proposed system is composed of two Z-source inverters operating in parallel only one PEM(Polymer Electrolyte Membrane)FC system. Also, as the control algorithm of the active power filter, a single phase P-Q theory and PI control are adopted. The effectiveness of the proposed the system is verified by the PSIM simulation in the steady state and the transient state.

• 전력전자학회논문지
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• 제27권2호
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• pp.165-173
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• 2022

The electrification trend of mobility increases every year due to the development of power semiconductor and battery technology. Accordingly, the development and distribution of fast chargers for electric vehicles (EVs) are in demand. In this study, we propose a design and implementation method of an LLC converter for fast chargers. Two 15 kW LLC converters are configured in parallel to have 30 kW rated output power, and the control algorithm and driving sequence are designed accordingly and verified. In addition, the improved power conversion efficiency is confirmed through zero-voltage switching (ZVS) of the LLC converter and reduction of turn-off loss through snubber capacitors. The implemented 30 kW LLC converters show a wide output voltage range of 200-950 V. Experiments applying various load conditions verify the converter performance.