• Journal of Electrical Engineering and Technology
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• v.9 no.6
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• pp.2224-2236
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• 2014

The performance of an isolated high voltage full bridge converter is improved using a voltage doubler. In a conventional high voltage full bridge converter, the diode of the transformer secondary voltage undergoes a voltage spike due to the leakage inductance of the transformer and the resonance occurring with the parasitic capacitance of the diode. In addition, in the phase shift control, conduction loss largely increases from the freewheeling mode because of the circulating current. The efficiency of the converter is thus reduced. However, in the proposed converter, the high voltage dual converter consists of a voltage doubler because the circulating current of the converter is reduced to increase efficiency. On the other hand, in the proposed converter, an input current is distributed when using parallel input / serial output and the output voltage can be doubled. However, the voltages in the 2 serial DC links might be unbalanced due to line impedance, passive and active components impedance, and sensor error. Considering these problems, DC injection is performed due to the complementary operations of half bridge inverters as well as the disadvantage of the unbalance in the DC link. Therefore, the serial output of the converter needs to control the balance of the algorithm. In this paper, the performance of the conventional converter is improved and a balance control algorithm is proposed for the proposed converter. Also, the system of the 1.5[kW] PCS is verified through an experiment examining the operation and stability.

• 전기의세계
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• v.23 no.4
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• pp.60-65
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• 1974

This paper is to study on the pilot work of bi-directional S.C.R. power converter adopted by the method of diode-bridge type circuit. This apparatus acts as a converter when it is used in convering 3-phase a.c source to d.c output, and it can be used as an inverter which recovering surplus d.c power to a.c source when d.c load become active to cause the induced voltage higher than the presetted point of d.c output voltage. At the same time, its d.c voltage varies continuously in the presetted range of positive and/or negative polarity. As a result of test, the AC/DC bi-directional power converter represents maximum converting efficiency of 91% and power factor of 0.98. Furthermore, this converter also can be applied as a cycleconverter by varying the period of gate triggering signal.

• Proceedings of the KIEE Conference
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• 1998.11b
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• pp.403-406
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• 1998

There are two cases of error occurrence of STT(Smart Temperature Transmitter). One is that because of unstable reference voltage, data from A/D converter is not reliable. The other is that because of change of room temperature, this change affects conversion of A/D converter. In this paper, we show algorithms be adapted to STT for reliable conversion of A/D converter through a experiment and compensation for temperature change. In a experiment, we collect data from reference voltage and ground then calculate nominal value of these at constant temperature during A/D converter initialization or at any conversion time. Algorithm for compensation for unstable reference voltage calculates a correction factor and adapts it to compensation for malfunction of A/D converter. Algorithm for compensation for variation of room temperature is come from linearization of thermistor but is adapted to zener diode, not thermistor, therefor we have less effort for compensation for temperature and have a idea that it can be adapted to A/D converter system.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.8
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• pp.10-21
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• 1999

This paper describes a 12bit CMOS current cell matrix D/A converter which shows a conversion rate of 65MHz and a power supply of 3.3V. Designed D/A converter utilizes current cell matrix structure with good monotonicity characteristic and fast settling time, and it is implemented by using the tree structure bias circuit, the symmetrical routing method with ground line and the cascode current switch to reduce the errors of the conventional D/A converter caused by a threshold voltage mismatch of current cells and a voltage drop of the ground line. The designed D/A converter was implemented with a $0.6{\mu}m$ CMOS n-well technology. The measured data shows a settling time of 20ns, a conversion rate of 50 MHz and a power dissipation of 35.6mW with a single power supply of 3.3V. The experimental SNR, DNL, and INL of the D/A converter is measured to be 55dB, ${\pm}0.5LSB$, and ${\pm}2LSB$, respectively.

• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.1
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• pp.54-60
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• 2020

A digital current control scheme using virtual d-q transformation for a boost single-phase power factor correction (PFC) converter is proposed. The use of virtual d-q transformation in single-phase power converters is known to improve current control performance. However, the conventional virtual d-q transformation-based digital current control scheme cannot be directly applied to the boost single-phase PFC converter because the current and average voltage waveforms of the inductor used in the converter are not sinusoidal. To cope with this problem, this study proposes a virtual sinusoidal signal generation method that converts the current and average voltage waveform of the inductor into a sinusoidal waveform synchronized with the grid. Simulation and experimental results are provided to show that the virtual d-q transformation-based digital current control is successfully applied to the boost single-phase PFC converter with the aid of the proposed virtual sinusoidal signal generation method.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.5
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• pp.443-447
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• 2013

This paper deals with LLC resonant converter of on-board charger for electric vehicle charging. Generally, the on-board charger must have a very widely charging voltage, higher efficiency, higher power factor, lower volume and lower weight. For reducing the switching losses, voltage and current stress of the device, the on-board charger is apply the half-bridge LLC resonant converter topology. To have a wide voltage range, it is design the hardware parameters and determine the switching frequency range of the LLC resonant converter. The experimental results show a wide charge voltage.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.197-200
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• 2002

In this paper, presents a 1.8V 8-bit 300MSPS CMOS Subranging Analog to Digital Converter (ADC) with a novel reference multiplex is described. The proposed hか converter is composed of Sub A/D Converter block, MUX (Multiplexer) block and digital block. In order to obtain a high-speed operation, further, a novel dynamic latch, an encoder of novel algorithm and a MUX block are proposed. As a result, this A/D Converter is operated 100MHz input frequence by 300MHz sampling rate.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.3230-3232
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• 1999

In this paper describes the design and improvement of a hybrid module for dual slope A/D converter. Since the input voltage to be converted is very sensitive and small. A/D converter must have the temperature stability. low-drift, and the high-resolution the conversion. A dual slop A/D converter circuit which is controlled by microprocessoer has been developed to reduce the offset voltage and the drift characteristics of operation amplifiers, and to improve the A/D conversion speed. Also hybrid module has been adapted to obtain the to obtain the stable and accurate A/D conversion for low cost use. The evaluation of the designed hybrid module has been shown as having a good performance, which will give usefull application to the industrial measurements use.

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.1166-1169
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• 1987

A new analog-la-digital structure. called cyclic-parallel analog-to-digital(A/D) converter, has been developed for video applications. It consists of a M-bit parallel A/D converter, a digital-to-analog(D/A) converter, a differencing amplifier with gain of $2^M$ and two sample-and-hold circuits. In this structure, the input signal is circulated around the circuits K times, thereby converted into a MK-bit digital word. The proposed converter retains speed advantages of conventional series-parallel converters, with half reduced circuit components.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1197-1200
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• 2003

This paper presents A/D converter for the signal processing of infrared sensor and CMOS image sensor. The A/D converter designed in a 0.25um CMOS process provides a resolution of 10bits at a sampling rate of 50MS/s while dissipating 67mW at 2.5V supply voltage. This A/D converter is based on a pipeline architecture in which the number of bits converted per stage and the stage number are optimized to achieve the desired linearity and reduce power consumption as well. Simulation results show that the A/D converter using 1.5bit per stage MDAC with switched capacitors and dynamic comparators efficiently reduces the power consumption.