• Journal of the Korean Magnetics Society
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• v.18 no.2
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• pp.49-53
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• 2008

Magnetic and crystallographic properties of patterned media fabricated by nanoimprint lithography and Co-Pt electroplating were studied. Thin films of Ru(20 nm)/Ta(5 nm)/$SiO_2$(100 nm) were deposited on Si(100) wafer and then 25 nm hole pattern was fabricated by nanoimprint lithography on substrate. The electroplated Co-Pt nano-dots have the diameter of 35 nm and the height of 27 nm. Magnetic dot patterns of Co-Pt alloy were created using electroplated Co-Pt alloy and then their properties were measured by MFM, SQUID, SEM, TEM and AFM. We observed single domain with perendicular anisotropy for each dot and achieved optimum coercivity of 2900 Oe. These results mean that patterned media fabricated by nanoimprint lithography and electroplating have good properties in view of extending superparamagnetic limit while satisfying the writability requirements with the present write heads.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.1
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• pp.105-112
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• 2018

This paper proposes a method for fabricating heatable glass using the conduction characteristics of metal thin films deposited on the surface of Low-e(Low emissivity) glass. The heating value of Low-e glass depends on the Joule heat caused by Low-e glass sheet resistance. Hence, its prediction and design are possible by measuring the sheet resistance of the material. In this study, silver electrodes were placed at 50 mm intervals on a soft Low-e glass sample with a low emissivity layer of 11 nm. This study measured the sheet resistance using a 4-point probe, predicted the power consumption and heating value of the Low-e glass, and confirmed the heating performance through fabrication and experience. There are two conventional methods for manufacturing heatable glass. One is a method of inserting nichrome heating wire into normal glass, and the other is a method of depositing a conductive transparent thin film on normal glass. The method of inserting nichrome heating wire is excellent in terms of the heating performance, but it damages the transparency of the glass. The method for depositing a conductive transparent thin film is good in terms of transparency, but its practicality is low because of its complicated process. This paper proposes a method for manufacturing heatable glass with the desired heating performance using Low-e glass, which is used mainly to improve the insulation performance of a building. That is by emitting a laser beam to the conductive metal film coated on the entire surface of the Low-e glass. The proposed method is superior in terms of transparency to the conventional method of inserting nichrome heating wire, and the manufacturing process is simpler than the method of depositing a conductive transparent thin film. In addition, the heat characteristics were compared according to the patterning of the surface thin film of the Low-e glass by an emitting laser and the laser output conditions suitable for Low-e glass.

• Transactions on Electrical and Electronic Materials
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• v.12 no.4
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• pp.131-134
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• 2011

Back-end-of-line using ultra low-k (ULK; k < 2.5) has been required to reduce resistive capacitance beyond 45 nmtechnologies, because micro-processing units need higher speed and density. There are two strategies to manufacture ULK inter-layer dielectric (ILD) materials using an air-gap (k = 1). The former ULK and calcinations of ILD degrade the mechanical strength and induce a high cost due to the complication of following process, such as chemical mechanical polishing and deposition of the barrier metal. In contrast, the air-gap based low-k ILD with a relatively higher density has been researched on the trench-type with activity, but it has limited application to high density devices due to its high air-gap into the next metal layer. The height of air-gap into the next metal layer was reduced by changing to the via-typed air-gap, up to about 50% compared to that of the trench-typed air-gap. The controllable ULK was easily fabricated using the via-typed air-gap. It is thought that the via-type air-gap made the better design margin like via-patterning in the area with the dense and narrow lines.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.208.1-208.1
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• 2015

최근, 차세대 투명 디스플레이 구동소자로서 산화물 반도체를 이용한 Transparent Amorphous Oxide Semiconductor (TAOS) 기술이 큰 주목을 받고 있다. 산화물 반도체는 기존의 a-Si에 비해 우수한 전기적인 특성과 낮은 구동전압 그리고 넓은 밴드 갭으로 인한 투명성의 장점들이 있다. 그리고 낮은 공정 온도에서도 제작이 가능하기 때문에 유리나 플라스틱과 같은 다양한 기판에서도 박막 증착이 가능하다. 하지만 기존의 furnace를 이용한 열처리 방식은 낮은 온도에서 우수한 전기적인 특성을 내기 어려우며, 공정 시간이 길어지는 단점들이 있다. 따라서 본 연구에서는 산화물 반도체중 In-Ga-Zn-O (IGZO)와 In-Sn-O(ITO)를 각각 채널 층과 게이트 전극으로 이용하였다. 또한 마이크로웨이브 열처리 기술을 이용하여 기존의 열처리 방식에 비해 에너지 전달 효율이 높고 짧은 시간동안 저온 공정이 가능하며 우수한 전기적인 특성을 가지는 투명 박막 트랜지스터를 구현 하였다. 본 실험은 glass 기판위에서 진행되었으며, RF sputter를 이용하여 ITO를 150 nm 증착한 후, photo-lithography 공정을 통하여 하부 게이트 전극을 형성하였다. 이후에 RF sputter를 이용하여 SiO2 와 IGZO 를 각각 300, 50 nm 증착하였고, patterning 과정을 통하여 채널 영역을 형성하였다. 또한 소자의 전기적인 특성 향상을 위해 마이크로웨이브 열처리를 1000 Watt로 2 분간 진행 하였고, 비교를 위하여 기존 방식인 furnace 를 이용하여 N2 분위기에서 $400^{\circ}C$로 30분간 진행한 소자도 병행하였다. 그 결과 마이크로웨이브를 통해 열처리한 소자는 공정 온도가 $100^{\circ}C$ 이하로 낮기 때문에 glass 기판에 영향을 주지 않고 기존 furnace 열처리 한 소자보다 전체적으로 전기적인 특성이 우수한 것을 확인 하였다.

• Korean Journal of Optics and Photonics
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• v.21 no.1
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• pp.6-11
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• 2010

Fluorescent photopolymer film was prepared with composition containing acrylate monomer, binder, a visible light sensitive photo initiator, and fluorescent anthracene polymer. A fluorescent grating pattern was inscribed on the photopolymer film using a 2-beam coupling method. A 514 nm laser was coupled to generate a beam-interference pattern. A highly fluorescent diffractive line pattern was formed on the fluorescent photopolymer within 30 sec. of exposure. The fluorescence intensity was highly enhanced in the patterned area, possibly due to the change in the environment of the fluorescent polymers by the photo-polymerization of monomers. Under a photo-mask, a gap electrode pattern was formed of fluorescent gratings with a sub-micron scale, which was matched well to the calculated value ($2.5\;{\mu}m$ and $0.6\;{\mu}m$) based on the refractive index of the photopolymer and beam incident angle ($3.4^{\circ}$, $15^{\circ}$) to the photopolymer surface.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.418-418
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• 2008

The electrochemical etching of silicon in HF-based solutions is known to form various types of porous structures. Porous structures are generally classified into three categories according to pore sizes: micropore (below 2 nm in size), mesopore (2 ~ 50 nm), and macropore (above 50 nm). Recently, the formation of macropores has attracted increasing interest because of their promising characteristics for an wide scope of applications such as microelectromechanical systems (MEMS), chemical sensors, biotechnology, photonic crystals, and photovoltaic application. One of the promising applications of macropores is in the field of MEMS. Anisotropic etching is essential step for fabrication of MEMS. Conventional wet etching has advantages such as low processing cost and high throughput, but it is unsuitable to fabricate high-aspect-ratio structures with vertical sidewalls due to its inherent etching characteristics along certain crystal orientations. Reactive ion dry etching is another technique of anisotropic etching. This has excellent ability to fabricate high-aspect-ratio structures with vertical sidewalls and high accuracy. However, its high processing cost is one of the bottlenecks for widely successful commercialization of MEMS. In contrast, by using electrochemical etching method together with pre-patterning by lithographic step, regular macropore arrays with very high-aspect-ratio up to 250 can be obtained. The formed macropores have very smooth surface and side, unlike deep reactive ion etching where surfaces are damaged and wavy. Especially, to make vertical microwire or nanowire arrays (aspect ratio = over 1:100) on silicon wafer with top-down photolithography, it is very difficult to fabricate them with conventional dry etching. The electrochemical etching is the most proper candidate to do it. The pillar structures are demonstrated for n-type silicon and the formation mechanism is well explained, while such a experimental results are few for p-type silicon. In this report, In order to understand the roles played by the kinds of etching solution and mask patterns in the formation of microwire arrays, we have undertaken a systematic study of the solvent effects in mixtures of HF, dimethyl sulfoxide (DMSO), iso-propanol, and mixtures of HF with water on the structure formation on monocrystalline p-type silicon with a resistivity with 10 ~ 20 $\Omega{\cdot}cm$. The different morphological results are presented according to mask patterns and etching solutions.

• Proceedings of the Optical Society of Korea Conference
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• 2009.02a
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• pp.133-134
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• 2009

Cold temperature development (CTD) of electron beam (EB) patterned resists and subsequent dry etching were investigated for fabrication of nano-patterned Niobium (Nb). Bulky Nb fims on GaAs substrates were deposited with EB evaporation. Line patterns on Nb cathode were fabricated by EB patterning and reactive ion etching (RIE). Size deviations of nano-sized line patterns from CAD designed patterns are dependent on the EB total exposure, but it can be improved by CTD of EB-exposed resist. Line patterns of 10 to 300 nm widths of EB-exposed resist patterns were drawn under various exposure conditions of $0.2{\mu}s$/dot (total 240,000 dot) with a constant current (50 pA). Compared with room temperature development (RTD), the CTD improves pattern resolution due to the suppression of backscattering effect. RIE with $CF_4$ was performed for formation of several nano-sized line patterns on Nb. Each EB-resist patterned samples with RTDs and CTDs were etched with two different $CF_4$ gas pressures of 5 Pa. Nb etching rate increases while GaAs (or ZEP) etching rate decreases as the chamber pressure increases. This different dependent of the etching rate on the $CF_4$ pressure between Nb and GaAs (or ZEP) has a significant meaning because selective etching of nano-sized Nb line patterns is possible without etching of the underlying active layer.