• Macromolecular Research
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• v.13 no.5
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• pp.435-440
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• 2005

This study describes a method where the match of two different length scales, i.e., the patterns from self-assembled block copolymer (<50 nm) and electron beam writing (>50 nm), allow the nanometer scale pattern mask. The method is based on using block copolymers containing a poly(methyl methacrylate) (PMMA) block, which is subject to be decomposed under an electron beam, as a pattern resist for electron beam lithography. Electron beam on self assembled block copolymer thin film selectively etches PMMA microdomains, giving rise to a polymeric nano-pattern mask on which subsequent evaporation of chromium produces the arrays of Cr nanoparticles followed by lifting off the mask. Furthermore, electron beam lithography was performed on the micropatterned block copolymer film fabricated by micro-imprinting, leading to a hierarchical self assembled pattern where a broad range of length scales was effectively assembled, ranging from several tens of nanometers, through submicrons, to a few microns.

• Transactions of Materials Processing
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• v.13 no.3
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• pp.285-289
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• 2004

Micro tensile test specimens of thin film single crystal silicon for the most useful structural materials in MEMS (Micro Electro Mechanical System) devices were fabricated using SOI (Silicon-on-Insulator) wafers and MEMS processes. Dimensions of micro tensile test specimens were thickness of $7\mu\textrm{m}$, width of 50~$350\mu\textrm{m}$, and length of 2mm. Top and bottom silicon were etched using by deep RIE (Reactive Ion Etching). Thin film aluminum markers on testing region of specimens with width of $5\mu\textrm{m}$, lengths of 30~$180\mu\textrm{m}$ and thickness of 200 nm for measuring tensile strain were fabricated by aluminum wet etching method. Fabricated side wall angles of aluminum marker were about $45^{\circ}~50^{\circ}$. He-Ne laser with wavelength of 633nm was used for checking fringed patterns.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.327-327
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• 2013

본 연구에서는 $SiO_2$ Target과 $In_2O_3$ Target으로 co-sputtering방법을 이용해 증착한 Si-doped $In_2O_3$ (ISO) 박막의 Si 도핑 농도에 따른 전기적, 광학적, 구조적 특성에 대해 연구하였고, 이를 유기태양 전지(OPVs) 에 적용함으로써 그 가능성을 타진하였다. $In_2O_3$ target의 DC power를 100 W로 고정시킨 채 $SiO_2$ target의 RF power 크기를 20~60 W 변화시키면서 상온에서 실험을 진행한 결과 최적 조건은 박막의 두께가 200 nm일 때 Working pressure는 3 mTorr이고, RF power는 50 W이었다. 이 조건으로 제작된 ISO 박막은 550 nm에서 81.51%의 광투과율과 51.91 Ohm/sq.의 비교적 낮은 면저항이 나타남을 Hall measurement 및 UV/Vis spectroscopy 분석을 통해 알 수 있었다. 또한 X-ray diffraction 분석법과 Transmission Electron Microscope 분석법을 통해 $SiO_2$ 도핑 power가 50 W 이상으로 증가할 경우 ISO 박막의 결정성이 감소하여 완벽한 비정질상의 ISO 투명박막이 형성됨을 확인할 수 있었다. 비정질 특성을 갖는 ISO 투명 전극을 이용하여 유기 박막형 태양전지를 제작한 결과 Voc (0.576 V), Jsc (7.671 mA/$cm^2$), FF (62.96%), PCE (2.78%)의 특성을 나타냄으로서 co-sputtering 공정을 통해 최적화된 ISO 박막을 유기 박막형 태양전지에 적용함으로써 광전소자로의 적용 가능성을 확인할 수 있었다.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2016.11a
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• pp.134-134
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• 2016

The effect of different thermal treatments on the sub-50 nm copper nanoparticles is examined in the aspects of chemical, electrical and surface morphology. The copper nanoparticles are chemically synthesized and fabricated for paste-type solution. Simple bar coating method is practiced as a deposition process to form copper thin film on a typical slide glass. Deposited copper thin films are annealed by two different routes: general tube furnace with 99.99 % Ar atmosphere and selective laser sintering process. The thermal behavior of the different thermal-treated copper thin films is compared by SEM, XRD, FT-IR and XPS analysis. In this study, the laser sintering process ensures low annealing temperature, fast working speed and ambient-accessible route. Moreover, the laser-sintered copper thin film shows good electrical property and enhanced chemical stability than conventional thermal annealing process. Consequently, the proposed laser sintering process can be compatible with plastic substrate for flexible applications.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.117-123
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• 2013

By exploiting the regular read and write access patterns of embedded SRAM memories inside Viterbi decoder, the memory architecture can be efficiently modified to reduce the power consumption of write operation. According to the experimental results with 65nm CMOS process, the proposed embedded memory used for Viterbi decoder achieves 30.84% of power savings with 8.92% of area overhead compared to the conventional embedded SRAM approaches.

• Journal of the Korean Ceramic Society
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• v.50 no.6
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• pp.390-395
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• 2013

Nanocrystalline CrN films were deposited on Si (100) substrates by means of asymmetric pulsed DC reactive magnetron sputtering. We investigated the growth behavior, corrosion resistance and mechanical properties of CrN films with a change in the duty cycle and pulse frequency. The grain size of the CrN films decreased from 25.4 nm to 11.2 nm upon a decrease in the duty cycle. The corrosion potentials for the CrN films by DC sputtering was approximately - 0.6 V, and it increased to - 0.3 V in the CrN films which underwent pulsed sputtering. The nanoindentation hardness of the CrN films also increased with a decrease in the duty cycle. This enhancement of the corrosion resistance and mechanical properties of pulsed sputtered CrN films could be attributed to the densification and surface smoothness of the microstructure of the films.

• Journal of IKEEE
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• v.18 no.2
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• pp.198-205
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• 2014

As the development of information technology, the interests in tiny applications such as wearable devices, portable devices and RFID are increased and the importance of low-area encryption circuit is emphasized. This paper proposes a compact architecture of AES-based encryption circuit suitable for tiny applications. The circuit area is reduced by minimizing storage space and sharing computation resources. The synthesized gate-level circuit using 65nm standard cell library consists of 2,241 gates and two $8{\times}16$-bit SRAMs. It can process data at a rate of 50.57Mbits per second. Therefore, the proposed encryption circuit is suitable for various applications requiring very small encryption circuit.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.367-367
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• 2008

Aluminum nitride (AlN) thin films have been deposited on Si substrate by using reactive RF magnetron sputtering method in a gas mixture of Ar and $N_2$ at different $N_2$ concentration. It was found that $N_2$ concentration was varied in the range up to 20-100%, highly c-axis oriented film can be obtained at 50% $N_2$ with full width at half maximum (FWHM) $4.5^{\circ}$. Decrease in surface roughness from 7.5 nm to 4.6 nm found to be associated with decrease in grain size, with $N_2$ concentration; however, the AlN film fabricated at 20% $N_2$ exhibited a granular type of structure with non-uniform grains. The absorption peak was observed around 675 $cm^{-1}$ in fourier transform infrared spectroscopy (FTIR). It is concluded that the AlN film deposited at $N_2$ concentration of 50% exhibited the most desirable properties for the application of high-frequency surface acoustic devices.

• Journal of Electrical Engineering and Technology
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• v.7 no.3
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• pp.396-400
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• 2012

Novel fabrication method of nanobridge array of various materials was proposed using suspended silicon nanowire array as a sacrificial template structure. Nanobridges of various materials can be simply fabricated by direct deposition with thermal evaporation on the top of prefabricated suspended silicon nanobridge arrays, which are used as a sacrificial structure. Since silicon nanowire can be easily removed by selective dry etching, nanobridge arrays of an intended material are finally obtained. In this paper, metal nanobridges of Ti/Au, around 50-200 nm in thickness and width, 5-20 ${\mu}m$ in length were fabricated to prove the advantages of the proposed nanowire or nanobridge fabrication method. The nanobridges of Ti/Au after complete removal of sacrificial silicon nanowire template were well-established and bending of nanobridge caused by the tensile stress was observed after silicon removing. Up to 50 nm and 10 ${\mu}m$ of silicon nanowire in diameter and length respectively was also very useful for nanowire templates.

• Korean Chemical Engineering Research
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• v.50 no.2
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• pp.204-210
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• 2012

Nickel oxide thin films with 2.3 ${\mu}m$ thickness were prepared in order to overcome limitations of thickness with nm dimension by anodizing. For the electrolyte, ethylene glycol was used as solvent, and $NH_4F$ was added for source of $F^-$ ions. The anodizing experiments were carried out on various voltages such as 40, 60 V and 80 V for 12 hours. The thickness of NiO was changed according to the anodizing time and the voltage. However, destruction of Ni caused by rapid oxidation reaction occurred at 80 V. XRD results show that NiO was successfully created by anodizing.