• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.13 no.6
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• pp.23-28
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• 2013

Because characteristics of diversity, large-scale and unpredictability of disaster are very difficult to make predict of disaster, rapid disaster response activity is important to reduce damage from disaster. Therefore emergency communication technology is essential to information sharing between field personnel in the field. Because the heterogeneous radios defined as some of 100MHz VHF, 400MHz UHF, and 800MHz emergency communication RF band are used in Korea, the field personnels need to have multiple radios. In order to use one radio per personnel, radio voice intercommunication is very necessary. We study on modular 3-Band RF to communicate between heterogeneous radios through single multi-band antenna and verify scalable of the number of equipped radios.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.4
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• pp.629-635
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• 2009

The FSK duplex remote controlling wireless transmission units with a common local oscillator circuit for transmitter and receiver are designed and implemented in this paper. In the FSK full-duplex the channel frequency for Tx/Rx is allocated, a common switching oscillator circuit for Tx/Rx is designed in the FSK half-duplex scheme. Both of FSK units get functions of automatic channel detection for busy channels and channel configuration for an idle channel in order to reduce the RF channel interference and are designed as a remote controller with small-sized low power of 10mW and the 400MHz-colpitz type PLL configuration of 50kHz channel separation. The full-duplex Tx/Rx link frequency gets frequency difference of 42.8MHz, which is double of 21.4MHz IF frequency.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.4
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• pp.9-15
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• 2006

This paper shows the impedance profile of PEEC(Partial Equivalent Electrical Circuit) PDN(Power Distribution Networks) including core and I/O circuit. Through the simulated results, we find that the core power noise having connection with I/O power is affected by I/O switching. Also, using designed $74{\times}5inch$ DLL(Delay Locked Loop) test board, we analyzed the effect of power noise on operation region of chip. Jitter of a DLL measure for frequency of $50{\sim}400MHz$ and compared with impedance obtained result of simulation. Jitter of a DLL are increased near about frequency of 100MHz. It is reason that the resonant peak of PDNs has an impedance of more the 1ohm on 100MHz. we present the impedance profile of a chip and board for the decoupling capacitor reduced the target impedance. Therefore, power supply network design should be considered not only decoupling capacitors but also core switching current and I/O switching current.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.6
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• pp.408-420
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• 2003

This paper describes a Delay Locked Loop (DLL) circuit having two advancements : 1) a dual loop operation for a wide lock-range and 2) programmable replica delays using antifuse circuitry and internal voltage generator for a post-package skew calibration. The dual loop operation uses information from the initial time-difference between reference clock and internal clock to select one of the differential internal loops. This increases the lock-range of the DLL to the lower frequency. In addition, incorporation with the programmable replica delay using antifuse circuitry and internal voltage generator allows for the elimination of skews between external clock and internal clock that occur from on and off-chip variations after the package process. The proposed DLL, fabricated on 0.16m process, operates over the wide range of 42MHz - 400MHz with 2.3v power supply. The measured results show 43psec peak-to-peak jitter and 4.71psec ms jitter consuming 52㎽ at 400MHz.

• IT SoC Magazine
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• s.3
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• pp.35-37
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• 2004

본 연구팀이 Hynix 0.35um CMOS 4M 2P 공정을 사용하여 제작한 민수용 DDFS (DAC를 포함한 single chip)는 DC부터 100MHz 까지 사용할 수 있으며(BW=100MHz) frequency 변환속도 약 30nS, 주파수해상도 0.0745Hz, 그리고 소비 전력은 120MHz 클럭에서 약 200mW이다. 본고에서는 언급하지 않았지만, 본 연구팀이 별도의 설계로 진행된 군수용 DDFS의 경우, 출력주파수는 DC부터 320MHz 까지 가능하고 소비 전력은 800MHz 클럭에서 약 400mW이다. 이처럼 DDFS는 특성 자체의 우수성 뿐 아니라, 각종 멀티미디어 기기 및 통신시스템의 급격한 디지털화 추세로 인해 주파수합성기도 디지털화 함으로써 VLSI화가 용이하고, 이에 따라 S/W에 의한 다기능화 (programmability), 응용성의 극대화, 및 저가격화를 추구할 수 있다는 점에서 주목해야 할 분야이다. 특히 반도체기술의 발전으로 지금까지 DDFS 구현의 가장 큰 장애로 대두되던 DAC의 고속화가 부분적으로 가능해지면서 (TTL-to-ECL interface 부가회로가 별도로 필요없이 직접적인 연결), DDFS의 시장 전망을 더욱 밝게 하고 있다.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.1
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• pp.47-51
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• 2014

In this paper, unit cell and arrayed cover for improving the transfer efficiency of resonant wireless power transfer system is proposed. We used the characteristic of zero refractive index for focusing a magnetic field between the transmitting resonator and receiving resonator. For zero refractive index, we designed the unit cell structure that have a negative value of effective permeability. The size of proposed unit cell based on metamaterial structure is $70mm{\times}70mm{\times}3.2mm$, operating frequency is 13.56 MHz. And, the size of arrayed cover is $400mm{\times}400mm{\times}3.2mm$, is consists of 2-layers. The transfer efficiency of the proposed wireless power transfer system are 94.8 %, 93.2 %, 91.4 %, 90.8 % at 100 mm, 200 mm, 300 mm and 400 mm (distance between transmitting and receiving resonator), respectively. And proposed WPT system has a transfer efficiency high than 90 % over the overall distances.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.2
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• pp.170-175
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• 2016

In order to transmit baseband signals through frequency dividing devices, we studied the transfer function of the device in the term of the baseband signal distortion. From the analysis, it is shown that the magnitude of the envelope signal is related to the mixer gain and the insertion loss of the low pass filter whilst the phase is the additional function with the 1/2 of the phase delay. For the purpose of the verification of the study, we designed a dynamic frequency divider at 1,400 MHz. The operating frequency range of the device is closely related to the conversion gain of mixers and the amplitude of input signal, and becomes wide as the conversion gain of mixers increases. The designed frequency divider operates between 0.9 GHz and 3.2 GHz, for -14.5 dBm input power. The circuit shows 20 mW power dissipation at $V_{DD}=2.5V$, and the simulation result shows that an amplitude modulated signal at 1,400 MHz with the modulation index of 0.9 was successfully downconverted to 700 MHz.

• Journal of IKEEE
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• v.9 no.2 s.17
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• pp.115-122
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• 2005

We report 400 femto-second highly stable, nearly transform-limited, pulse generation at 10 GHz in $1540{\sim}1550$ nm wavelength region by adiabatic soliton pulse compression of an actively mode-locked fiber ring laser output. Without using any supermode selection device, supermode beating noise has been suppressed below -123 dB/Hz, resulting less than 100 femto-second timing jitters at the noise band of $1\;kHz{\sim}100\;MHz$.

• Journal of the Korean Institute of Telematics and Electronics
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• v.22 no.6
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• pp.97-102
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• 1985

A new microwave transmission line frequency discriminator in MIC is described, which is composed of a branch-line hybrid 3dB coupler, a λ/2-short stub and a λ/4-opcn stub. It is experimentally verified that the discriminator is linear in a 400 MHz bandwidth at center frequency 4.94 GHz and has return loss more than 15dB in that range.

• Journal of Electrical Engineering and Technology
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• v.9 no.2
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• pp.771-776
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• 2014

In this paper, an agile programmable chirp spread spectrum generator for wideband frequency-jamming applications from 20 MHz to 3 GHz is proposed. A frequency-mixing architecture using two voltage-controlled oscillators is used to achieve a wideband operating frequency range, and the direct digital synthesizer (DDS)-based chirping method with a two-point modulation technique is employed to provide a programmable and consistent chirp bandwidth. The proposed signal generator provides the various programmable FM signals from 20 MHz to 3 GHz with a modulation bandwidth from 0 to 400 MHz. The prototype successfully demonstrates arbitrary sequential jamming operation with a fast band-to-band hopping time of < 10 ${\mu}sec$.