• International Journal of Concrete Structures and Materials
• /
• v.10 no.3
• /
• pp.307-323
• /
• 2016

The nonlinear behaviors of recycled aggregate concrete (RAC) frame structure are investigated by numerical simulation method with 3-D finite fiber elements. The dynamic characteristics and the seismic performance of the RAC frame structure are analyzed and validated with the shaking table test results. Specifically, the natural frequency and the typical responses (e.g., storey deformation, capacity curve, etc.) from Model 1 (exclusion of strain rate effect) and Model 2 (inclusion of strain rate effect) are analyzed and compared. It is revealed that Model 2 is more likely to provide a better match between the numerical simulation and the shaking table test as key attributes of seismic behaviors of the frame structure are captured by this model. For the purpose to examine how seismic behaviors of the RAC frame structure vary under different strain rates in a real seismic situation, a numerical simulation is performed by varying the strain rate. The storey displacement response and the base shear for the RAC frame structure under different strain rates are investigated and analyzed. It is implied that the structural behavior of the RAC frame structure is significantly influenced by the strain rate effect. On one hand, the storey displacements vary slightly in the trend of decreasing with the increasing strain rate. On the other hand, the base shear of the RAC frame structure under dynamic loading conditions increases with gradually increasing amplitude of the strain rate.

• Journal of Broadcast Engineering
• /
• v.21 no.4
• /
• pp.472-483
• /
• 2016

This paper proposes a blocking artifacts detection algorithm in frequency domain for MC-FRUC (Motion Compensated Frame Rate Up-Conversion). Conventional MC-FRUC algorithms occur blocking artifacts near interpolated block boundaries since motion compensation is performed from block-based motion vector. For efficiently decreasing blocking artifacts, this paper analyses frequency characteristics of the interpolated frame and reduces blocking artifacts on block boundaries. In experimental results the proposed method shows better subjective quality than some conventional FRUC method and also increases the PSNR(Peak Signal to Noise Ratio) value on average 0.45 dB compared with BDMC(Bi-Directional Motion Compensation).

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.14 no.2
• /
• pp.383-393
• /
• 2010

DVC (Distributed Video Coding) allows us to explore the video statistics at the decoder side, resulting in a less complex encoder and more complex decoder. In this approach, it is important to generate a good prediction to the current Wyner-Ziv frame, called side information, which plays a crucial role in the overall performance of a DVC system. Conventional MCFI (motion compensated frame interpolation) techniques, which explore temporal correlations between neighbor frames of the current frame, preform the block-based or object-based motion estimation, but, they do not include the basis frame for the Wyner-Ziv frame. This paper proposes an efficient way to get better side information, by finding the average frame between neighbor frames and by comparing adaptively the candidate blocks. Through computer simulations, it is shown that the proposed method can improve the performance up to 0.4dB and provide better subjective and objective visual qualities in Wyner-Ziv CODEC.

• Journal of Korea Foundry Society
• /
• v.25 no.4
• /
• pp.145-150
• /
• 2005

• Steel and Composite Structures
• /
• v.50 no.5
• /
• pp.583-594
• /
• 2024

In this paper, a Guided Simulated Annealing (GSA) algorithm is presented to optimize 2D and 3D steel frames against Progressive Collapse. Considering the nature of structural optimization problems, a number of restrictions and improvements have been applied to the decision mechanisms of the algorithm without harming the randomness. With these improvements, the algorithm aims to focus relatively on the flawed variables of the analyzed frame. Besides that, it is intended to be more rational by instituting structural constraints on the sections to be selected as variables. In addition to the LRFD restrictions, the alternate path method with nonlinear dynamic procedure is used to assess the risk of progressive collapse, as specified in the US Department of Defense United Facilities Criteria (UFC) Design of Buildings to Resist Progressive Collapse. The entire optimization procedure was carried out on a C# software that supports parallel processing developed by the authors, and the frames were analyzed in SAP2000 using OAPI. Time history analyses of the removal scenarios are distributed to the processor cores in order to reduce computational time. The GSA produced 3% lighter structure weights than the SA (Simulated Annealing) and 4% lighter structure weights than the GA (Genetic Algorithm) for the 2D steel frame. For the 3D model, the GSA obtained 3% lighter results than the SA. Furthermore, it is clear that the UFC and LRFD requirements differ when the acceptance criteria are examined. It has been observed that the moment capacity of the entire frame is critical when designing according to UFC.

• Journal of the Institute of Electronics Engineers of Korea TE
• /
• v.42 no.4
• /
• pp.21-26
• /
• 2005

This paper presents a watermarking method using similarity between frames in the scene to resist to various attacks and to improve the video quality. This method inserts and detects a watermark in the frame pair every 3 frame. The experimental simulations show that the video quality is improved more than 45dB compared with previous methods and the watermark is resistant to frame drop, MPEG compression and low pass filter attacks.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.2
• /
• pp.64-70
• /
• 2009

A 6-Gbps feed-forward equalizer having a 6.2-dB gain at 3GHz is designed in 0.13-um CMOS technology and the equalizer helps error-free data recovery over a 7-m SATA cable with 14.7dB loss. Based on a differentially-connected varactor, the proposed equalizer uses only a one-fourth varactor size of a conventional equalizer, which enables the equalizer's integration in a pad-frame, high operating frequency, and low power dissipation of 3.6mW.

• Journal of KIISE:Software and Applications
• /
• v.29 no.6
• /
• pp.355-366
• /
• 2002

This paper introduces the MPEG-4 video frame-based bitrate control methodology using two dimensional history pool and a sliding window. Proposed method preferentially clusters the encoded results according to the image characteristics and stores those results into the 2 dimensional history pool. Among the stored results in the pool, the sliding window collects the encoded results whose characteristics are very similar to the image frame to be encoded. Feedback regression is finally carried out bated on the collected results. Therefore proposed method can actively adapt to the rapid varying image characteristics by reducing the occurrences of the extrapolations when determining the quantization steps. Proposed method has better performances than the MPEG-4 frame-based bitrate control algorithm by evaluating with the actually encoded bits per frame, encoded PSNR's, and frame skips.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.40 no.11
• /
• pp.29-36
• /
• 2003

In this paper, an efficient VLSI architecture for DCTQ module, which consists of 2D-DCT, quantization, AC/DC prediction block, scan conversion, inverse quantization and 2D-IDCT, is presented. The architecture of the module is designed to handle a macroblock data within 1064 cycles and suitable for MPEG-4 video codec handling 30 frame CIF image for both encoder and decoder simultaneously. Only single 1-D DCT/IDCT cores are used for the design instead of 2-D DCT/IDCT, respectively. 1-bit serial distributed arithmetic architecture is adopted for 1-D DCT/IDCT to reduce the hardware area in this architecture. To reduce the power consumption of DCTQ modu1e, we propose the method not to operate the DCTQ modu1e exploiting the SAE(sum of absolute error) value from motion estimation and cbp(coded block pattern). To reduce the AC/DC prediction memory size, the memory architecture and memory access method for AC/DC prediction block is proposed. As the result, the maximum utilization of hardware can be achieved, and power consumption can be minimized. The proposed design is operated on 27MHz clock. The experimental results show that the accuracy of DCT and IDCT meet the IEEE specification.

• The Pure and Applied Mathematics
• /
• v.25 no.4
• /
• pp.229-241
• /
• 2018

In the present study, we derive the problem of constructing a hypersurface family from a given isogeodesic curve in the 4D Galilean space $G_4$. We obtain the hypersurface as a linear combination of the Frenet frame in $G_4$ and examine the necessary and sufficient conditions for the curve as a geodesic curve. Finally, some examples related to our method are given for the sake of clarity.