• 대한전자공학회논문지TC
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• 제42권3호
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• pp.39-44
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• 2005

무선랜용 전력증폭기의 비선형특성과 출력 ACPR 관계를 분석하기위해, 최대 54Mbps의 전송속도를 가지는 IEEE 802.11g OFDM 변조부와 송신부를 모델링하였다. 2.4GHz 전력증폭기의 비선형특성은 behavioral model을 이용하여 An-to-AM과 AM-to-PM으로 모델링하였으며, 위상 왜곡특성에 따른 출력스펙트럼 특성을 해석하였다. IEEE 802.11g 무선랜 시스템의 요구 출력스펙트럼 마스크를 만족하기위한 P1dB로부터 back-off값을 구하기 위하여 모델링한 위상왜곡 크기에 따른 전력증폭기의 ACPR 특성을 시뮬레이션하고 사전위상 왜곡방식을 이용하여 증폭기의 위상왜곡을 변화시키며 측정한 결과와 시뮬레이션 특성을 비교 제시하였다.

• 대한전자공학회논문지SD
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• 제46권3호
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• pp.86-95
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• 2009

SIFT(Scale Invariant Feature Transform) 알고리즘은 영상 데이터로부터 객체의 꼭지점이나 모서리와 같이 색상 성분의 차가 심한 영역에서 특징점을 찾아 벡터성분을 추출하는 알고리즘으로, 현재 얼굴인식, 3차원 객체 인식, 파노라마, 3차원 영상 복원 작업의 핵심 알고리즘으로 연구 되고 있다. 본 논문에서는 SIFT 알고리즘을 임베디드 환경에서 실시간으로 처리하기 위해 가장 연산량이 많은 특징점 위치 결정 단계를 Verilog HDL 언어를 이용하여 FPGA로 구현하고 그 성능을 분석한다. 하드웨어는 100MHz 클럭에서 $1,280{\times}960$영상기준 25ms, $640{\times}480$영상기준 5ms의 빠른 연산속도를 보인다. 그리고 Xilinx Virtex4 XC4VLS60 FPGA를 타겟으로 Synplify Pro 8.1i합성툴을 이용하여 합성시 약 45,792LUT(85%)의 결과를 나타낸다.

• Journal of Electrical Engineering and Technology
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• 제11권3호
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• pp.609-617
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• 2016

Belt-driven Starter Generator (BSG) differs from other mild hybrid systems as the crankshaft of vehicle are not run off. Motor permits a low-cost method of adding mild hybrid capabilities such as start-stop, power assist, and mild levels of regenerative braking. Wound rotor synchronous motor (WRSM) could be adopted in BSG system for HEV e-Assisted application instead of the interior permanent magnet synchronous motor (IPMSM). In practice, adequate torque is indispensable for starter assist system, and energy conversion should be taken into account for the HEV or EV as well. Particularly, flux weakening control is possible to realize by adjusting both direct axis components of current and field current in WRSM. Accordingly, this paper present an off-line current acquisition algorithm that can reasonably combine the stator and field current to acquire the maximum torque, meanwhile the energy conversion is taken into consideration by losses. Besides, on account of inductance influence by non-uniform air gap around rotor, nonlinear inductances and armature flux linkage against current variation are proposed to guarantee the results closer to reality. A computer-aided method for proposed algorithm are present and results are given in form of the Look-up table (LUT). The experiment shows the validity of algorithm.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2003년도 ICCAS
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• pp.1066-1070
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• 2003

Recently technologies have created new principle and theory but the PID control system remains its popularity as the PID controller contains simple structure, including maintenance and parameter adjustment being so simple. Thus, this paper proposes auto tune PID by fuzzy logic controller based on FPGA which to achieve real time and small size circuit board. The digital PID controller design to consist of analog to digital converter which use chip TDA8763AM/3 (10 bit high-speed low power ADC), digital to analog converter which use two chip DAC08 (8 bit digital to analog converters) and fuzzy logic tune digital PID processor embedded on chip FPGA XC2S50-5tq-144. The digital PID processor was designed by fundamental PID equation which architectures including multiplier, adder, subtracter and some other logic gate. The fuzzy logic tune digital PID was designed by look up table (LUT) method which data storage into ROM refer from trial and error process. The digital PID processor verified behavior by the application program ModelSimXE. The result of simulation when input is units step and vary controller gain ($K_p$, $K_i$ and $K_d$) are similarity with theory of PID and maximum execution time is 150 ns/action at frequency are 30 MHz. The fuzzy logic tune digital PID controller based on FPGA was verified by control model of level control system which can control level into model are correctly and rapidly. Finally, this design use small size circuit board and very faster than computer and microcontroller.