• The Korean Journal of Ceramics
• /
• 제5권1호
• /
• pp.50-54
• /
• 1999

$(Pb_xLa_{1-x}) (Zr_yTi_{1-y})O_3$ (PLZT) thin films with electrooptic effect are promising for the optical application such as display or light shutter. However, it is difficult to use inexpensive and transparent glass substrates because the conventional process for preparation of PLZT requires temperatures above $600^{\circ}C$. In order to deposit a perovskite PLZT thin films at low processing temperatures through alkoxide route, we have offered several seeding processes which reduce the activation energy for crystallization. In this study, we optimized the stacking structure of multilayered PLZT for obtaining single phase perovskite at lower temperatures. As a result, ferroelectric PLZT thin films with different compositions were successfully prepared at a temperature as low at $500^{\circ}C$.

• 한국유체기계학회 논문집
• /
• 제13권2호
• /
• pp.48-53
• /
• 2010

A computerized design system of axial fan is developed for constructing 3-D blade geometry and predicting both aerodynamic performance and noise. The aerodynamic blading design of fan is conducted by blade angle distribution, camber line determination, airfoil thickness distribution and blade element stacking along spanwise distance. The internal flow and the aerodynamic performance of designed fan are predicted by the through-flow modeling technique with flow deviation and pressure loss correlations. Based on the predicted internal flow field and performance data, fan noise is predicted by two models for discrete frequency and broadband noise sources. The present predictions of the flow distribution, the performance and the noise level of actual fans are well agreed with measurement results.

• Carbon letters
• /
• 제2권2호
• /
• pp.99-104
• /
• 2001

Partial mesophase (PM) pitch precursor was prepared from fluidized catalytic cracking-decant oils (FCC-DO) by chemical reaction in the presence of $Br_2$. The PM pitch heated-treatment at $420^{\circ}C$ for 9 h exhibited the softening point of $297^{\circ}C$ with 23% yield, and 55% anisotropic content. The PM pitch precursor was melt-spun through circular nozzle by pressurized $N_2$, stabilized at $310^{\circ}C$, carbonized at $700^{\circ}C$, $1000^{\circ}C$, and $1200^{\circ}C$. The enough stabilization introduced 16.4% of the oxygen approximately. The stacking height ($L_{c002}$) and interlayer spacing ($d_{002}$) of the as-spun fibers were 4.58 nm and $3.45{\AA}$ and the value became minimum and maximum at $700^{\circ}C$ respectively in the carbonization procedure. The tensile strength increased with an increase in the heat treatment temperature exhibiting highest value of 750 MPa at $1200^{\circ}C$ carbonization.

• 한국전기전자재료학회논문지
• /
• 제16권12S호
• /
• pp.1237-1241
• /
• 2003

In this paper, we report a novel RF-MEMS packaging technology with lightweight, small size, and short electric path length. To achieve this goal, we used the ultra thin silicon substrate as a packaging substrate. The via holes lot vortical feed-through were fabricated on the thin silicon wafer by wet chemical processing. Then, via holes were filled and micro-bumps were fabricated by electroplating. The packaged RF device has a reflection loss under 22 〔㏈〕 and a insertion loss of -0.04∼-0.08 〔㏈〕. These measurements show that we could package the RF device without loss and interference by using the vertical feed-through. Specially, with the ultra thin silicon wafer we can realize of a device package that has low-cost, lightweight and small size. Also, we can extend a 3-D packaging structure by stacking assembled thin packages.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2006년도 하계종합학술대회
• /
• pp.595-596
• /
• 2006

A novel Si via structure is suggested and fabricated for 3D MEMS package using the doped silicon as an interconnection material. Oxide isolations which define Si via are formed simultaneously when fabricating the MEMS structure by using DRIE and oxidation. Silicon Direct Bonding Multi-stacking process is used for stacked package, which consists of a substrate, MEMS structure layer and a cover layer. The bonded wafers are thinned by lapping and polishing. A via with the size of $20{\mu}m$ is fabricated and the electrical and mechanical characteristics of via are under testing.

• 한국지진공학회:학술대회논문집
• /
• 한국지진공학회 2003년도 추계 학술발표회논문집
• /
• pp.3-7
• /
• 2003

The velocity structure beneath the CHNB broadband station is determined by receiver function analysis using by from teleseismic P waveforms. The detailed broadband receiver functions are obtained by stacking method for source-equalized vertical, radial and tangential components of teleseismic P waveforms. A time domain inversion uses the stacked radial receiver function to determine vertical P wave velocity structure beneath the station. The crustal velocity structures beneath the stations are estimated using the receiver function inversion method in the case at the crustal model parameterized by many thin, flat-lying, homogeneous layers. Events divide into 4 groups. four azimuths corresponding to events in group a(southwest), b(south), c(southeast), d(northeast). The result of crust at model inversion shows the crustal velocity structure beneath the CHNB station varies smoothly with increasing depth. The conard discontinuity lies around 18 km and moho discontinuity lies range from 30 to 34 km.

• 한국자기학회:학술대회 개요집
• /
• 한국자기학회 2000년도 International Symposium on Magnetics The 2000 Fall Conference
• /
• pp.352-362
• /
• 2000

In this study, effects of novel VMn underlayer on magnetic properties of CoCrPt/VMn longitudinal medium was studied and compared with those of CoCrPt/Cr medium. It was found that the VMn film had (200) preferred orientation and the lattice constant was about 0.2967 nm, which is slightly larger than that of the Cr, 0.2888 nm. The grain size of VMn film was 9.3 nm at 30 nm thickness, and this is about 38 % smaller than that of a similarly deposited Cr film. The CoCrPt/VMn films showed higher coercivity in comparison with the CoCrPt/Cr films. The coercivity increase seems to be attributed to the increased Co (11.0) texture, improved lattice matching between Co (11.0) and VMn (200), and lower stacking fault density. Mn must have diffused into the CoCrPt magnetic layer more uniformly rather than preferentially along grain boundaries this reduced Ms at higher substrate temperature

• 전자통신동향분석
• /
• 제38권6호
• /
• pp.52-61
• /
• 2023

With semiconductor scaling approaching the physical limits, devices including CMOS (complementary metal-oxide-semiconductor) components have managed to overcome yet are currently struggling with several technical issues like short-channel effects. Evolving from the process node of 22 nm with FinFET (fin field effect transistor), state-of-the-art semiconductor technology has reached the 3 nm node with the GAA-FET (gate-all-around FET), which appropriately addresses the main issues of power, performance, and cost. Technical problems remain regarding the foundry of GAA-FET, and next-generation devices called post-GAA transistors have not yet been devised, except for the CFET (complementary FET). We introduce a CFET that spatially stacks p- and n-channel FETs on the same footprint and describe its structure and fabrication. Technical details like stacking of nanosheets, special spacers, hetero-epitaxy, and selective recess are more thoroughly reviewed than in similar articles on CFET fabrication.

• 한국정밀공학회지
• /
• 제29권5호
• /
• pp.563-571
• /
• 2012

In 3D integration package using TSV technology, bonding is the core technology for stacking and interconnecting the chips or wafers. During bonding process, however, warpage and high stress are introduced, and will lead to the misalignment problem between two chips being bonded and failure of the chips. In this paper, a finite element approach is used to predict the warpages and stresses during the bonding process. In particular, in-plane deformation which directly affects the bonding misalignment is closely analyzed. Three types of bonding technology, which are Sn-Ag solder bonding, Cu-Cu direct bonding and SiO2 direct bonding, are compared. Numerical analysis indicates that warpage and stress are accumulated and become larger for each bonding step. In-plane deformation is much larger than out-of-plane deformation during bonding process. Cu-Cu bonding shows the largest warpage, while SiO2 direct bonding shows the smallest warpage. For stress, Sn-Ag solder bonding shows the largest stress, while Cu-Cu bonding shows the smallest. The stress is mainly concentrated at the interface between the via hole and silicon chip or via hole and bonding area. Misalignment induced during Cu-Cu and Sn-Ag solder bonding is equal to or larger than the size of via diameter, therefore should be reduced by lowering bonding temperature and proper selection of package materials.

• 한국전산구조공학회논문집
• /
• 제37권2호
• /
• pp.143-149
• /
• 2024

이미지 분석을 통한 재료의 상 구분은 재료의 미세구조 분석을 위해 필수적이다. 이미지 분석에 주로 사용되는 마이크로-CT 이미지는 대체로 재료를 구성하고 있는 상에 따라 회색조 값이 다르게 나타나므로 이미지의 회색조 값 비교를 통해 상을 구분한다. 순환골재의 고체상은 수화된 시멘트풀과 천연골재로 구분되는데, 시멘트풀과 천연골재는 CT이미지 상에서 유사한 회색조 분포를 보여 상을 구분하기 어렵다. 본 연구에서는 Unet-VGG16 네트워크를 활용하여 순환골재 CT 이미지로부터 천연골재를 분할하는 자동화 방법을 제안하였다. 딥러닝 네트워크를 활용하여 2차원 순환골재 CT 이미지로부터 천연골재 영역을 분할하는 방법과 이를 3차원으로 적층하여 3차원 천연골재 이미지를 얻는 방법을 제시하였다. 선별된 3차원 천연골재 이미지에서 각각의 골재 입자를 분할하기 위해 이미지 필터링을 사용하였다. 골재 영역 분할 성능을 정확도, 정밀도, 재현율 F1 스코어를 통해 검증하였다.